Cirrus Logic Crystal CS8427 Series Preliminary Product Information page 4

LIST OF FIGURES
Figure 1. Audio Port Master Mode Timing....................................................................................... 7
Figure 2. Audio Port Slave Mode and Data Input Timing ................................................................ 7
Figure 3. SPI Mode timing............................................................................................................... 8
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Figure 4. I C Mode timing ............................................................................................................... 9
Figure 5. Recommended Connection Diagram for Software Mode............................................... 10
Figure 6. Jitter Attenuation Characteristics of PLL with 8 to 96 kHz Fs Filter Components-AES3 13
Figure 7. Jitter Attenuation Characteristics of PLL with 32 to 96 kHz Fs Filter Components-AES313
Figure 8. Jitter Attenuation Characteristics of PLL with 8 to 96 kHz Fs Filter Components-ILRCK14
Figure 9. Jitter Attenuation Characteristics of PLL with 32 to 96 kHz Fs Filter Components-ILRCK14
Figure 10. Software Mode Audio Data Flow Switching Options.................................................... 18
Figure 11. CS8427 Clock Routing................................................................................................. 18
Figure 12. AES3 Input to Serial Audio Output, Serial Audio Input to AES3 Out ........................... 19
Figure 13. AES3 Input to Serial Audio Output Only ...................................................................... 19
Figure 14. Input Serial Port to AES3 Transmitter .......................................................................... 19
Figure 15. AES3 Receiver Timing for U pin output data ............................................................... 20
Figure 16. AES3 Transmitter Timing for C, U and V pin input data............................................... 20
Figure 17. Serial Audio Input Example Formats............................................................................ 21
Figure 18. Serial Audio Output Example Formats......................................................................... 22
Figure 19. Control Port Timing in SPI Mode.................................................................................. 24
Figure 20. Control Port Timing in I2C Mode.................................................................................. 24
Figure 21. Hardware Mode............................................................................................................ 41
Figure 22. Professional Output Circuit .......................................................................................... 49
Figure 23. Consumer Output Circuit.............................................................................................. 49
Figure 24. TTL/CMOS Output Circuit ............................................................................................ 49
Figure 25. Professional Input Circuit ............................................................................................. 50
Figure 26. Transformerless Professional Input Circuit .................................................................. 50
Figure 27. Consumer Input Circuit ................................................................................................ 50
Figure 28. TTL/CMOS Input Circuit............................................................................................... 50
Figure 29. Channel Status Data Buffer Structure.......................................................................... 51
Figure 30. Flowchart for Reading the E Buffer .............................................................................. 52
Figure 31. Flowchart for Writing the E Buffer ................................................................................ 52
LIST OF TABLES
Table 1. PLL External Components using AES3 Receiver ........................................................... 13
Table 2. PLL External Components using ILRCK ......................................................................... 14
Table 3. Control Register Map Summary ...................................................................................... 25
Table 4. Hardware Mode Start-up Options.................................................................................... 42
Table 5. Serial Audio Output Formats Available in Hardware Mode ............................................. 42
Table 6. Serial Audio Input Formats Available in Hardware Mode................................................ 42
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CS8427
DS477PP1