Non-Audio Auto-Detection; Aes3 Transmitter; Transmitted Frame And Channel Status Boundary Timing - Cirrus Logic Crystal CS8427 Series Preliminary Product Information

If the incoming user data bits have been encoded as
Q-channel subcode, the data is decoded and pre-
sented in ten consecutive register locations. An in-
terrupt may be enabled to indicate the decoding of
a new Q-channel block, which may be read via the
control port.
4.2.7

Non-Audio Auto-Detection

An AES3 data stream may be used to convey non-
audio data, thus it is important to know whether the
incoming AES3 data stream is digital audio or not.
This information is typically conveyed in channel
status bit 1 (AUDIO), which is extracted automati-
cally by the CS8427. However, certain non-audio
sources, such as AC3 or MPEG encoders, may not
adhere to this convention, and the bit may not be
properly set. The CS8427 AES3 receiver can detect
such non-audio data. This is accomplished by look-
ing for a 96-bit sync code, consisting of 0x0000,
0x0000, 0x0000, 0x0000, 0xF872, and 0x4E1F.
When the sync code is detected, an internal AUTO-
DETECT signal will be asserted. If no additional
sync codes are detected within the next 4096
frames, AUTODETECT will be de-asserted until
another sync code is detected. The AUDIO bit in
the Receiver Channel Status register is the logical
OR of AUTODETECT and the received channel
status bit 1. If non-audio data is detected, the data
is still processed exactly as if it were normal audio.
It is up to the user to mute the outputs as required.

4.3 AES3 Transmitter

The AES3 transmitter encodes and transmits audio
and digital data according to the AES3, IEC60958
(S/PDIF), and EIAJ CP-1201 interface standards.
Audio and control data are multiplexed together
and bi-phase mark encoded. The resulting bit
stream is driven to an output connector either di-
rectly or through a transformer.
16
The transmitter clock may be derived from the
clock input pin OMCK, or from the incoming data.
If OMCK is asynchronous to the data source, an in-
terrupt bit is provided that will go high every time
a data sample is dropped or repeated.
The channel status (C) and user channel (U) bits in
the transmitted data stream are taken from storage
areas within the CS8427. The user can manually
access the internal storage or configure the CS8427
to run in one of several automatic modes. The Ap-
pendix: Channel Status and User Data Buffer Man-
agement provides detailed descriptions of each
automatic mode and describes methods of manual-
ly accessing the storage areas. The transmitted user
data can optionally be input via the U pin, under the
control of a control port register bit. Figure 15
shows the timing requirements for inputting U data
via the U pin.
4.3.1 Transmitted Frame and Channel
Status Boundary Timing
The TCBL pin is used to control or indicate the
start of transmitted channel status block boundaries
and may be used as an input or output.
In some applications, it may be necessary to control
the precise timing of the transmitted AES3 frame
boundaries. This may be achieved in three ways:
a) With TCBL set to input, driving TCBL high for
>3 OMCK clocks will cause a frame start, as well
as a new channel status block start.
b) If the AES3 output comes from the AES3 input,
setting TCBL as output will cause AES3 output
frame boundaries to align with AES3 input frame
boundaries.
c) If the AES3 output comes from the serial audio
input port while the port is in slave mode and
TCBL is set to output, the start of the A channel
sub-frame will be aligned with the leading edge of
ILRCK.
CS8427
DS477PP1