2. TYPICAL CONNECTION DIAGRAM
AES3/
SPDIF
Source
* A separate analog supply is only necessary in applications where RMCK is used
for a jitter sensitive task. For applications where RMCK is not used for a jitter
sensitive task, connect VA+ to VD+ via a ferrite bead. Keep the decoupling
capacitor between VA+ and AGND.
10
Ferrite *
Bead
+5V
Analog
Supply *
VA+
Cable
RXP
Termination
RXN
ILRCK
3-wire Serial
ISCLK
Audio Source
SDIN
Clock Source
RMCK
and Control
OMCK
47kΩ
EMPH
RERR
Hardware
Control
RST
TCBL
AGND
To other
CS8427's
Figure 5. Recommended Connection Diagram for Software Mode
µ
0.1 F
µ
0.1 F
VD+
TXP
TXN
CS8427
OLRCK
OSCLK
SDOUT
SDA/CDOUT
AD0/CS
SCL/CCLK
AD1/CDIN
INT
U
H/S
FILT
DGND
RFILT
CFILT
CRIP
+3 to +5 V
Digital
Supply
AES3/
Cable
SPDIF
Interface
Equipment
3-wire Serial
Audio Input
Device
Microcontroller
CS8427
DS477PP1
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