System Architecture - Analog Devices ADSP-21369 EZ-KIT Lite Manual

System Architecture

System Architecture
This section describes the processor's configuration on the EZ-KIT Lite
board (Figure 2-1).
JTAG
Header
Debug
Agent
24.576 MHz
Oscillator
Reset PB
DPI
Conn
RS
232 ADM3202
Conn
5
1
A5V 3.3V 1.3V
LEDs
Power Regulation (8)
Figure 2-1. System Architecture Block Diagram
The EZ-KIT Lite is designed to demonstrate the ADSP-21369 processor
capabilities. The processor core is powered at 1.3V, and the I/O is pow-
ered at 3.3V.
2-2
www.BDTIC.com/ADI
ADSP-21369
DSP
FLAGs
DPI
0,1, and 3
2
2
SPI FLASH
PBs (4)
ADSP-21369 EZ-KIT Lite Evaluation System Manual
4M x 32 512k x 8
SDRAM SRAM
External
Port
DAI
AD1835
CODEC
2
Stereo In RCA Stereo Out RCA
Jacks (2x1) Jacks (4x2)
1M x 8
Flash
Expansion
Connectors
Type A
SPDIF In
Phono
SPDIF Out
Phono
DAI
Conn
ELVIS
Conn
Headphone
Jack