Codec Setup Switch (SW3)
The codec setup switch (
signals going to the AD1835A codec and to set up the communication
protocol of the codec.
positions 1 and 2 determine the clock routing for the audio oscillator
SW3
to the codec and to the processor.
positions 1 and 2 connect on the board. In the default position, route the
pin to
DAI_P17
ADSP-21369 Processor
DAI_P6
DAI_P17
Figure 2-5. Audio Clock Routing
position 3 determines if the AD1835A device is a master or a slave. If
SW3
the AD1835A is a master, the device's serial interface generates the frame
sync and clock signals necessary to transfer data. When the device is a
slave, the processor must generate the frame sync and clock signals. By
default, position 3 is
signals.
position 4 disconnects the AD1835A codec's
SW3
DAI. This is useful when the DAI is connected to another device.
ADSP-21369 EZ-KIT Lite Evaluation System Manual
www.BDTIC.com/ADI
ADSP-21369 EZ-KIT Lite Hardware Reference
) can be used to change the routing of some
SW3
(in software) to clock the AD1835A codec.
DAI_P6
SW3.1
SW3.2
, and the AD1835A codec generates the control
ON
Figure 2-5
illustrates how the switch
AD1835A Codec
MCLK
12.288 MHz
OSC
ADC_DATA
pin from the
2-11
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