Boot Mode And Clock Ratio Select Switch (Sw2) - Analog Devices ADSP-21369 EZ-KIT Lite Manual

Evaluation system
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Switches

Boot Mode and Clock Ratio Select Switch (SW2)

The
switch sets the boot mode and clock multiplier ratio of the pro-
SW2
cessor.
Table 2-3
positions 1 and 2. By default, the EZ-KIT Lite boots in external port
mode from flash memory.
Table 2-3. Boot Mode Configuration Switch (SW2)
BOOTCFG0 Pin (Position 1)
ON
ON
OFF
OFF
Table 2-4
shows how to set up the clock multiply ratio using
positions 3 and 4. By default, the processor increases the clock multiply
ratio by sixteen, setting the core clock to 393.216 MHz.
Table 2-4. Core Clock Rate Configuration
CLKCFG0 (Position 3)
ON
ON
OFF
OFF
The core clock frequency can be increased or decreased via software by
writing to the
PMCTL
clock frequency and other setup information, refer to the ADSP-21368
SHARC Processor Hardware Reference (includes ADSP-21369).
2-10
www.BDTIC.com/ADI
shows how to set up the boot mode using
BOOTCFG1 Pin (Position 2)
ON
OFF
ON
OFF
CLKCFG1 (Position 4)
ON
OFF
ON
OFF
register. For more information on changing the core
ADSP-21369 EZ-KIT Lite Evaluation System Manual
SW2
Boot Mode
SPI slave boot
Parallel flash boot (default)
SPI master boot
Reserved
SW2
Core to CLKIN Ratio
6:1
16:1 (default)
32:1
Reserved

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