Analog Devices ADSP-21369 EZ-KIT Lite Manual page 87

Evaluation system
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INDEX
S
schematic, of ADSP-21369 EZ-KIT Lite,
SDRAM
chip select pin (FLAG8),
configuration,
1-8
controller,
1-8
control signals,
2-7
via external port,
2-3
serial peripheral interface, See SPI
setup, of this EZ-KIT Lite,
signal routing units
SRU2 (DPI interface), 1-10,
SRU (DAI interface), 1-10,
spacing headers,
2-25
S/PDIF receivers,
1-10
SPI
disable switch (SW15),
flash memory, 1-7, 1-8,
master/slave boot modes, 2-3,
port, 1-8,
1-11
SRAM
async memory controller,
configuration,
1-7
via external port,
2-3
startup, of this EZ-KIT Lite,
SW12 (reset) push button,
SW13 (ELVIS station) switch,
SW14 (test) switch,
2-12
SW15 (SPI disable) switch,
SW1 (oscilloscope) switch,
SW2 (boot mode select) switch, 2-3, 2-6,
SW3 (AD1835A codec) switch, 2-5,
SW4 (microphone) switch, 1-11,
I-4
www.BDTIC.com/ADI
B-1
2-6
1-3
2-5
2-4
2-13
2-6
2-10
1-9
1-5
2-17
2-14
2-13
2-13
2-10
2-11
2-12
ADSP-21369 EZ-KIT Lite Evaluation System Manual
SW6 (test) switch,
2-12
SW7 (push button enable) DIP switch, 1-4,
1-12, 2-13,
2-17
SW8-11 (general input) push buttons,
synchronous dynamic random access memory,
See SDRAM
synchronous random access memory, See SRAM
system architecture, of this EZ-KIT Lite,
T
test switches (SW6, SW14),
time-division multiplexed (TDM) mode,
U
UART
interface, xi,
2-6
enable switch (SW5)
universal asynchronous receiver/transmitter, See
UART
USB
interface, 2-8,
2-25
cable, 1-3, 1-5, 2-16,
interface chip (U34),
monitor LED (ZLED3), 1-5,
V
VisualDSP++
environment,
1-5
voltage-controlled oscillator select jumper (JP1),
2-19
2-17
2-2
2-12
1-10
2-17
2-17
2-16

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