Hardware Layout And Configuration; Figure 2. Hardware Block Diagram - ST STM32H743I-EVAL User Manual

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Hardware layout and configuration

The STM32H743I-EVAL Evaluation board is designed around the STM32H743XIH6
(240+25-pin TFBGA package) microcontroller. The hardware block diagram (see
illustrates the connection between STM32H743XIH6 and the peripherals (SDRAM, SRAM,
NOR Flash, Twin Quad-SPI Flash, color LCD, USB OTG connectors, USART, Ethernet,
Audio, FD-CAN, microSD 3.0 card and embedded ST-LINK).
these features on the Evaluation board. The mechanical dimensions of the board are
showed in Figure 4.

Figure 2. Hardware block diagram

Hardware layout and configuration
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Figure
Figure 3 helps users to locate
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