Power Connector Cn10; Memory Connector Cn11 And Cn12; Table 24. Jtag/Swd Debugging Connector Cn9; Figure 14. Power Supply Connector Cn10 (Front View) - ST STM32H743I-EVAL User Manual

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9.10
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Table 24. JTAG/SWD debugging connector CN9

Pin number
1
3
5
7 TMS/SWDIO(PA13)
9 TCK/SWCLK(PA14)
11
13 TDO/SWO(PB3)
15
17
19 DBGACK(PJ12)

Power connector CN10

STM32H743I-EVAL Evaluation board can be powered from a DC 5 V power supply through
the external power supply jack (CN10) shown in
positive.

Figure 14. Power supply connector CN10 (front view)

Memory connector CN11 and CN12

Two 40-pin male headers CN11 and CN12 are used to connect with memory
daughterboard.
All GPIOs are connected on the extension connectors CN6 and CN7, but the GPIOs which
are used for FMC memory signals, are connected on CN11 and CN12.
The space between these two connectors is defined as a standard that allows to develop
common daughterboard. The standard width between CN11 pin1 and CN12 pin1 is 1914
mils (48.62 mm). For details on signals assignment refer to
Description
number
+3.3V
TRST(PB4)
TDI(PA15)
RTCK
RESET#
DBGRQ(PJ7)
Figure
DocID030511 Rev 1
Pin
Description
2 +3.3V
4 GND
6 GND
8 GND
10 GND
12 GND
14 GND
16 GND
18 GND
20 GND
14. The central pin of CN10 must be
Table 25 and Table
UM2198
26.