Hardware layout and configuration
Note:
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Table 3. Power related jumpers (continued)
Jumper
To supply the STM32H743I-EVAL board through the USB OTG2 HS (CN14), set
JP10 as shown to the right:
JP10
To supply the STM32H743I-EVAL board and the daughterboard connected on CN6
and CN7 through the power supply jack (CN10), set JP10 as shown to the right
(daughterboard must not have its power supply connected)
V
is connected to +3.3 V when JP11 is set as shown to the right: (Default setting)
BAT
JP11
V
is connected to the battery when JP11 is set as shown to the right:
BAT
The LED LD9 lights up when the STM32H743I-EVAL Evaluation board is powered by the
5 V correctly.
To avoid the impact of USB PHY, Ethernet PHY and get precise results about current
consumption on JP9, take into account the following cautions:
1) Remove JP5 to avoid Ethernet PHY influence
2) Configure USB HS PHY into low-power mode (Register Address=04, bit 6 in USB PHY)
Clock source
Two clock sources (X1 and X2) are available on the STM32H743I-EVAL Evaluation board
for the STM32H743XI and RTC embedded. Other clock sources (X3 and X4) are used for
their peripherals:
•
X1, 25-MHz crystal for STM32H743XI, it can be disconnected by removing R15 and
R16 when internal RC clock is used
•
X2, 32-KHz crystal for embedded RTC
•
X3, 25-MHz crystal for Ethernet PHY
•
X4, 24-MHz crystal for USB OTG2 HS PHY
Description
DocID030511 Rev 1
UM2198
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