Bit Data Update Timing - Mitsubishi Electric AnyWire ASLINK User Manual

Bit data update timing

Input
Unless the NZ2AW1GNAL receives the same bit input data twice successively, data in the bit input area is not updated.
A minimum of 1-bit transmission cycle time and a maximum of 2-bit transmission cycle time are required as data response
time.
Therefore, when an input signal is shorter than 2-bit transmission cycle time, the input data may not be captured depending
on the timing.
To ensure the response, provide an input signal that is longer than 2-bit transmission cycle time.
■Case of minimum data response time
If no change is detected in input data between two sampling timings, communication in 1-bit transmission cycle time is
possible.
(1)
(2)
(1) Sampling timing
(2) Change of the input data
(3) Update of the input data
■Case of maximum data response time
The input data is changed after a sampling, and thus the next sampling will be the first data reception. Time equivalent to 2-bit
transmission cycle time is required.
(1)
(2)
(1) Sampling timing
(2) Change of the input data
(3) Update of the input data
Output
As the bit data double verification is performed on the slave module side, the time required is the same as that for input,
namely a minimum of 1-bit transmission cycle time and a maximum of 2-bit transmission cycle time.
(1)
(3)
(1) (1)
(3)
Appendix 5 Processing Time
A
APPX
179