Sony PCS-1500 Service Manual page 105

CPU(IC100) Vcc=3.3V
HD6417708S
\IRL0-3
CKIO
\BS
\CS1
\CS4
\CS5
\CS6
A -A
0 25
\RD
\WE0
\WE1
D -D
0 15
RD/WR
\IOCS16
PCS-1500/1500P
30MHz
26
32
Fig. 3-7 System Bus I/F of CPU Block
3-2. Circuit Description of the Respective Boards
BUS Controller PLD(IC110)
M4LV128/64-12VC
\IRL0-3
4
CLK
\BS
\CS1
\CS4
\CS5
\CS6
A -A ,A -A
1 3 20 24
8
\RD
\WE0
\WE1
D -D
0 7
\WAIT_PCM
\DEN5
\DEN3
STANDBY
Buffer(IC106,107)
LVC244 or LCX244,WH125
7
\G
Transceiver(IC105)
LVC245 or LCX245
D -D
0 15
16
DIR
\G
Buffer(IC109)
LVC244 or LCX244
5
\G
Transceiver(IC108)
LVC245 or LCX245
D -D
0 15
16
DIR
\G
Vcc=3.3V
IRQ_x
9
\HCS_x
10
Some of these
\HRD_VCP
are connected
to BusSwitch
\HWR_VCP
(IC111,112)
\HWR_GOA
\DEN_OP
\WAIT_OP
\RES_x
7
\PWD_AK
\RD_PCM
\DEN_PCM
RES_PCM
PWR_PCM
SLEEP
Vcc=3.3V-2
LVHA
1-7
7
\LVHRD
\LVWR_P
3.3V-
Bus
Vcc=3.3V-2
LVHD
0-15
16
Vcc=3.3V
HA
1-5
5
\HRD
\HWR
5V-
Bus
Vcc=3.3V
HD
0-15
16
3-15