Sony PCS-1500 Service Manual page 103

CPU(IC100)
HD6417708S
WE2/DQMUL/ICIORD
WE3/DQMUU/ICIOWR
from/to
DIAG PORT
from IC200
MD2/RXD
MD1/TXD
to IC200
from X100
EXTAL
7.5MHz
\RESET
Vcc=3.3V
Supply Voltage Supervisor(IC115)
TLC7733
+12V +3.3V
SENSE
\RESET
PCS-1500/1500P
Vcc=3.3V
30MHz
CKIO
CKE
\CS3
\RAS
\CAS
RD/WR
A -A
0 25
26
D -D
0 31
WE0/DQMLL
WE1/DQMLU
\CS0
\RD
CS6/CE1B
MD4/CE2B
MD3
MD5
WAIT,IRL3-0
from
Bus Controller
IOCS16
from Bus Controller
Delay
\Reset CPU
to IC200
from Bus Controller
\POR
to Flash Memory & Bus Controller
Fig. 3-6 Memory and PCMCIA I/F of CPU Block
A -A
2 13
A ,A
22 23
D -D
0 15
D -D
16 31
32Mbit Flash RAM(IC103,104)
A -A
2 22
D -D
0 15
D -D
16 31
Buffer(IC131-133)
LVC244 or LCX244
A -A
0 24
from I/O Port 3
from PCMCIA
Power Controller
LVC244 or LCX244
to Bus Controller 2
Transceiver(IC130)
LVC245 or LCX245
D -D
0 15
LVC244 or LCX244
D -D
8 15
3-2. Circuit Description of the Respective Boards
64Mbit SDRAM(IC101,102) Vcc=3.3V
(1Mx16bitx4bank x 2)
CLK
CLK
CKE
CKE
\CS
\CS
\RAS
\RAS
\CAS
\CAS
\WE
\WE
A -A
0 11
A -A
0 11
A , A
12 13
A , A
11 12
DQ -DQ
0 15
DQ -DQ
0 31
LDQM
LDQM
UDQM
UDQM
Vcc=3.3V
(2Mx16bit x 2)
MBM29DL324B-90PFTN
\CE \BYTE
\CE BYTE
\WE
\WE
\OE RY/BY
\OE RY/BY
A -A
0 20
A -A
0 19
DQ -DQ \RESET
0 15
DQ -DQ RESET
from IC115
0 15
PCMCIA Interface
Vcc=3.3V-2
CE1
CE2
OE
WE/PGM
IORD
IOWR
A -A
0 24
25
A ,REQ/REG,RESET
25
3
G
Buffer(IC133)
WAIT,RDY/BSY or IREQ
2
D -D
0 15
16
DIR
G
Buffer(IC134)
CD1&CD2,
Over Current of Power
RDY/BSY or IREQ,
WP or IOCS16
7
G
RFU/INPACK
BVD2 or SPKR,
BVD1 or STSCHG
\POR
3-13