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Linearity
Select the Linearity tab to perform a linearity test on the XADC. During this test, the signal
source is used as a map source to the XADC.
When the Collect Data button is clicked in the GUI, the DAC begins to ramp up and the
XADC results are collected into a histogram. This histogram data is then transferred to the
GUI through the USB-UART connection and a differential non-linearity (DNL) and
integral non-linearity (INL) calculation are performed. This data then displays.
Sensor Data
The XADC block contains four integrated sensors within the FPGA. The first is a
temperature sensor and the other three monitor the FPGA voltage supplies: V
V
default mode or when they are enabled as part of the channel sequence of the XADC.
When the Sensor Data tab is selected, all of the XADC settings are stored in memory in the
GUI. The part is then forced into Default mode. See 7 Series FPGAs and Zynq-7000 All
Programmable SoC XADC Dual 12-Bit 1 MSPS Analog-to-Digital Converter User Guide
(UG480)
The Power Control panel highlighted in
voltages being applied to the three supplies in question: V
After changing the voltages and clicking the Update UCD9248 button, the corresponding
plot should change, showing the actual voltage now being applied to the part within the
part itself.
X-Ref Target - Figure 4-7
Change the actual voltages being applied to the FPGA
with the Texas Instruments UCD9248 power controller.
AMS101 Evaluation Card User Guide
UG886 (v1.3) November 6, 2013
, and V
. These sensors are all digitized by the XADC when the XADC is in
CCINT
CCBRAM
[Ref
6]. The digitized representation for the XADC then displays.
Figure 4-7: Sensor Data Tab and Power Control Panel
www.xilinx.com
XADC Performance Tests
Figure 4-7
can be used to modify physical
, V
CCAUX
,
CCAUX
, and V
.
CCINT
CCBRAM
UG886_c4_07_110413
43
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