Xadc Performance Tests - Xilinx AMS101 User Manual

X-Ref Target - Figure 4-5
When various modes of operation are selected, appropriate values are written to the Vp
and Vn offset fields. A change to the Input Type field or a change to Generate Sinewave
Using DAC causes such actions.
changed.
Table 4-1: AMS Evaluator Tool DAC Voltage Defaults

XADC Performance Tests

A selection of tabs is located across the top of the AMS Evaluator tool under the Xilinx
logo. Time Domain, Frequency Domain, Linearity, and Sensor Data tabs are associated
with XADC performance tests.
Time Domain
The Time Domain tab gives access to XADC data without any post processing. In single
channel mode, when the Collect Data button is clicked, 4,096 sequential XADC results are
taken from the V
AMS101 Evaluation Card User Guide
UG886 (v1.3) November 6, 2013
Figure 4-5: DAC Control Panel Options
Configuration
Unipolar mode (DAC sine wave generation).
Default power-up mode.
Unipolar mode (external source).
Bipolar mode (DAC sine wave generation).
Bipolar mode (external source).
/ V result register stored in memory. When all 4,096 samples are in
P
N
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Table 4-1 shows the default values set when the mode is
XADC Performance Tests
Uncheck this
box for DAC
DC outputs
Vn offset sets
DAC A (negative)
output voltage
Vp offset sets
DAC B (positive)
output voltage
UG886_c4_05_062712
DAC B DAC A
( V Offset) (V Offset)
P N
0.5V 0V
0.25V 0V
0.5V 0.5V
0.25V 0.5V
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