Quectel LTE-A Series Hardware Design page 9

Figure Index
FIGURE 1: FUNCTIONAL DIAGRAM ............................................................................................................... 16
FIGURE 2: PIN ASSIGNMENT (TOP VIEW) .................................................................................................... 19
FIGURE 3: DRX RUN TIME AND CURRENT CONSUMPTION IN SLEEP MODE ......................................... 32
FIGURE 4: SLEEP MODE APPLICATION VIA UART INTERFACES .............................................................. 33
FIGURE 5: SLEEP MODE APPLICATION WITH USB REMOTE WAKEUP .................................................... 33
FIGURE 6: SLEEP MODE APPLICATION WITH RI ......................................................................................... 34
FIGURE 7: SLEEP MODE APPLICATION WITHOUT SUSPEND FUNCTION................................................ 35
FIGURE 8: POWER SUPPLY LIMITS DURING TX POWER ........................................................................... 37
FIGURE 9: STAR STRUCTURE OF THE POWER SUPPLY ........................................................................... 37
FIGURE 10: REFERENCE CIRCUIT OF POWER SUPPLY ............................................................................ 38
FIGURE 11: TURN ON THE MODULE WITH A DRIVING CIRCUIT ............................................................... 39
FIGURE 12: TURN ON THE MODULE USING A BUTTON ............................................................................. 40
FIGURE 13: TIMING OF TURNING ON THE MODULE ................................................................................... 40
FIGURE 14: TIMING OF TURNING OFF THE MODULE ................................................................................. 41
FIGURE 15: REFERENCE CIRCUIT OF RESET_N WITH A DRIVING CIRCUIT ........................................... 42
FIGURE 16: REFERENCE CIRCUIT OF RESET_N WITH A BUTTON ........................................................... 43
FIGURE 17: TIMING OF RESETTING THE MODULE ..................................................................................... 43
FIGURE 18: REFERENCE CIRCUIT OF A (U)SIM INTERFACE WITH AN 8-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 45
FIGURE 19: REFERENCE CIRCUIT OF A (U)SIM INTERFACE WITH A 6-PIN (U)SIM CARD CONNECTOR
................................................................................................................................................................... 45
FIGURE 20: TIMING OF (U)SIM ....................................................................................................................... 46
FIGURE 21: TIMING OF HOT-PLUG ................................................................................................................ 46
FIGURE 22: REFERENCE CIRCUIT OF USB APPLICATION ......................................................................... 48
FIGURE 23: TIMING OF USB ENUMERATION ............................................................................................... 49
FIGURE 24: LEVEL TRANSLATION REFERENCE CIRCUIT WITH AN IC ..................................................... 52
FIGURE 25: LEVEL TRANSLATION REFERENCE CIRCUIT WITH MOSFETS ............................................. 53
FIGURE 26: TIMING OF SPI INTERFACE ....................................................................................................... 54
FIGURE 27: PRIMARY MODE TIMING ............................................................................................................ 55
FIGURE 28: AUXILIARY MODE TIMING .......................................................................................................... 56
FIGURE 29: REFERENCE CIRCUIT OF PCM APPLICATION WITH AUDIO CODEC ................................... 57
FIGURE 30: REFERENCE CIRCUIT OF THE NETWORK INDICATOR ......................................................... 59
FIGURE 31: REFERENCE CIRCUITS OF STATUS ........................................................................................ 60
FIGURE 32: PCIE INTERFACE REFERENCE CIRCUIT (RC MODE) ............................................................. 63
FIGURE 33: PCIE INTERFACE REFERENCE CIRCUIT (EP MODE) ............................................................. 64
FIGURE 34: REFERENCE CIRCUIT OF SD CARD APPLICATION ................................................................ 66
FIGURE 35: REFERENCE CIRCUIT OF USB_BOOT INTERFACE ................................................................ 68
FIGURE 36: REFERENCE CIRCUIT OF RF ANTENNA INTERFACES .......................................................... 74
FIGURE 37: REFERENCE CIRCUIT OF GNSS ANTENNA INTERFACE ....................................................... 76
FIGURE 38: MICROSTRIP DESIGN ON A 2-LAYER PCB .............................................................................. 77
FIGURE 39: COPLANAR WAVEGUIDE DESIGN ON A 2-LAYER PCB .......................................................... 77
EG18_Hardware_Design
LTE-A Module Series
EG18 Hardware Design
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