Functional Diagram - Quectel LTE-A Series Hardware Design

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NOTES
"*" means under development.
1.
1)
2.
Within operating temperature range, the module is 3GPP compliant.
2)
3.
Within extended temperature range, proper mounting, heating sinks and active cooling may be
required to make certain functions of the module such as voice, SMS, data transmission to be
realized. Only one or more parameters like Pout might reduce in their value and exceed the specified
tolerances. When the temperature returns to normal operating temperature levels, the module will
meet 3GPP specifications again.

2.3. Functional Diagram

The following figure shows a block diagram of EG18 and illustrates the major functional parts.
Power management
Baseband
LPDDR2 SDRAM+NAND Flash
Radio frequency
Peripheral interfaces
VBAT_RF
VBAT_BB
VDD_EXT
VDD_RF
PWRKEY
RESET_N
ADCs
EG18_Hardware_Design
ANT_DIV
ANT_GNSS
ET/APT
PRx
Tx
QLINK
PMIC
Control
38.4M
XO
USB2.0/3.0 USIMx2 PCM
Figure 1: Functional Diagram
ANT_MIMO2
ANT_MAIN
Tx/Rx Blocks
DRx
Transceiver
LPDDR2 SDRAM
Control
Baseband
PCIe*
I2C
UART
GPIOs
LTE-A Module Series
EG18 Hardware Design
ANT_MIMO1
NAND Flash
STATUS
I2S_MCLK
BT_UART/SPI
SDIO*
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