Quectel LTE-A Series Hardware Design page 49

For more details about the USB 2.0 and USB 3.0 specifications, please visit http://www.usb.org/home.
The USB interface is recommended to be reserved for firmware upgrade in design. The following figure
shows a reference circuit of USB 2.0 and USB 3.0 interface.
Module
USB_VBUS
USB_DM
USB_DP
100nF
USB_SS_TX_P
C1
100nF
USB_SS_TX_M
C2
USB_SS_RX_P
USB_SS_RX_M
USB_ID
GND
In order to ensure the signal integrity of USB data lines, C1, and C2 have been installed in the module; C3
and C4 must be placed close to the host; and R1, R2, R3 and R4 should be placed close to each other.
The extra stubs of trace must be as short as possible.
EG18_Hardware_Design
Minimize these stubs
R3
R4
VDD
R1
R2
Close to Module
Figure 22: Reference Circuit of USB Application
Test Points
NM_0R
NM_0R
ESD Array
0R
0R
100nF
100nF
LTE-A Module Series
EG18 Hardware Design
Host
USB_DM
USB_DP
USB_SS_RX_P
USB_SS_RX_M
C3
USB_SS_TX_P
C4
USB_SS_TX_M
GPIO
GND
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