Keysight Technologies X Series Service Manual page 88

Self Test
Self Test Descriptions
1505 Apps FPGA - QDR Memory Test
This test checks the QDR SRAM memory chips that are connected to the Apps
SX FPGAs. All of the testing is performed internally from a state machine within
the SX FPGAs. The testing first performs a ramp test followed by a random
test.
1506 RT Resampler
This test checks the signals to/from the resampler chip on the assembly. The
test first performs a clock auto-alignment on the resampler and then checks
the alignment range. Finally, a state machine within the SX FPGA is setup to
test the data lines to and from resampler.
1507 DSP Check
This test checks the signals to/from the DSP chip on the assembly.
1508 DSP SDRAM Memory Test
This test checks SDRAM memory. Data patterns are written to an address in
the SDRAM memory and subsequently read back. Within each address,
multiple writes/reads are made with various data patterns.
1509 RT - BB Serdes Alignment
This test checks the serdes signals between the A2 Baseband Generator and
the A7 Real Time Baseband Generator assemblies by performing an alignment.
These serdes signals are the differential digital IQ signals that flow between the
assemblies. There are two sets of these signals: one is for traffic from the A2
Baseband Generator to the A7 Real Time Generator, the second is for traffic
from the A7 Real Time Generator to the A2 Baseband Generator. On the A2
Baseband Generator assembly, all of the serdes signals driven from and/or
received from to the ARB FPGA. On the A7 Real Time Generator assembly, all
of the serdes signals are driven from and/or received from the FX FPGA. The
signals are passively connected in between by the A8 Real Time Baseband
Jumper board.
1510 RT – BB Marker Trigger
This test checks the marker and trigger lines between the A7 Real Time
Baseband Generator and A2 Baseband Generator assemblies.
1511 RT - BB Clocks
This test checks the "IO Clock" and "User Clock" lines for connectivity between
the A2 Baseband Generator and the A7 Real Time Baseband Generator
assemblies. These clock lines are connected to the ARB FPGA on the A2
Baseband Generator assembly and to the FX FPGA on the A7 Real Time
Baseband Generator assembly.
88 Keysight CXG, EXG, and MXG X-Series Signal Generators Service Guide