Platform Flash Prom Configuration; Linear Flash Memory Configuration; Spi Flash Memory Configuration - Xilinx ML505 User Manual

Chapter 1: ML505/ML506/ML507 Evaluation Platform

Platform Flash PROM Configuration

Linear Flash Memory Configuration

SPI Flash Memory Configuration

54
Downloaded from Elcodis.com electronic components distributor
Pressing the System ACE reset button also causes the System ACE controller to program
the FPGA if a CompactFlash card is present.
The Platform Flash PROMs can also be used to program the FPGA. A Platform Flash
PROM can hold up to two configuration images (up to four with compression), which are
selectable by the two least significant bits of the configuration address DIP switches.
The board is wired so the Platform Flash PROM can download bitstreams in Master Serial,
Slave Serial, Master SelectMAP (parallel), or Slave SelectMAP (parallel) modes. Using the
iMPACT tool to program the Platform Flash PROM, the user has the option to select which
of the four modes to use for programming the FPGA. The configuration mode DIP
switches on the board must be set to match the programming method being used by the
Platform Flash PROM.
When set correctly, the Platform Flash PROM programs the FPGA upon power-up or
whenever the Prog button is pressed.
Data stored in the linear flash can be used to program the FPGA (BPI mode). Up to four
configuration images can theoretically be supported.
The configuration mode DIP switches on the board must be set to 010 for BPI_up or 011
for BPI_down.
When set correctly, the FPGA is programmed upon power-up or whenever the Prog button
is pressed.
Data stored in SPI can be used to program the FPGA. The configuration mode DIP
switches must be set to 001 for SPI configuration.
When set correctly, the FPGA is programmed upon power-up or whenever the Prog button
is pressed.
www.xilinx.com ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
R