Jtag Trace/Debug; Cpu Debug Description - Xilinx ML505 User Manual

Chapter 1: ML505/ML506/ML507 Evaluation Platform

37. JTAG Trace/Debug

38
Downloaded from Elcodis.com electronic components distributor
Table 1-20: VGA Interface Connections (Cont'd)
Net Name
VGA_IN_RED5
VGA_IN_RED6
VGA_IN_RED7
VGA_IN_GREEN0
VGA_IN_GREEN1
VGA_IN_GREEN2
VGA_IN_GREEN3
VGA_IN_GREEN4
VGA_IN_GREEN5
VGA_IN_GREEN6
VGA_IN_GREEN7
VGA_IN_BLUE0
VGA_IN_BLUE1
VGA_IN_BLUE2
VGA_IN_BLUE3
VGA_IN_BLUE4
VGA_IN_BLUE5
VGA_IN_BLUE6
VGA_IN_BLUE7
VGA_IN_CLAMP
VGA_IN_COAST
VGA_IN_EVEN_B
VGA_IN_VSOUT
VGA_IN_HSOUT
VGA_IN_SOGOUT

CPU Debug Description

External-debug mode can be used to alter normal program execution. It provides the
ability to debug both system hardware and software. External-debug mode supports
setting of multiple breakpoints, as well as monitoring processor status. Access to processor
debugging resources is available through the CPU JTAG port (J51) providing the
appropriate connections to the FPGA fabric are in place.
FPGA Pin
AG6
Y11
W11
Y8
Y9
AD4
AD5
AA6
Y7
AD6
AE6
AC4
AC5
AB6
AB7
AA5
AB5
AC7
AD7
AH7
AG7
W6
Y6
AE7
AF6
www.xilinx.com ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
R