Xilinx ML505 User Manual page 45

Evaluation platform
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ML505/ML506/ML507 Evaluation Platform
UG347 (v3.1.1) October 7, 2009
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Table 1-27: Configuration for SFP Module Control and Status Signals
SFP Control/Status Signal
SFP TX FAULT
SFP TX DISABLE
SFP MOD DETECT
SFP RT SEL
SFP LOS
Table 1-28: SFP Module Connections
SFP Signal
FPGA Pin (U1)
CLKBUF_Q0_P
H4
CLKBUF_Q0_N
H3
SFP_RX_P
G1
H1
SFP_RX_N
SFP_TX_P
F2
G2
SFP_TX_N
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Board Connection
Test Point TP20
• High = Fault
• Low = Normal Operation
Jumper J82
• Jumper Off = SFP Enabled
• Jumper On = SFP Disabled
Test Point TP21
• High = Module Not Present
• Low = Module Present
Jumper J81
• Jumper Off = Full Bandwidth
• Jumper On = Reduced Bandwidth
Test Point TP22
• High = Loss of Receiver Signal
• Low = Normal Operation
LED DS40
• LED Off = Loss of Receiver Signal
• LED On = Normal Operation
Description
AC-coupled, LVDS, GTP REFCLK pair.
Receive pair.
• ML505/ML506: GTP0 of GTP_X0Y4
• ML507: GTX0 of
GTX_X0Y5
Transmit pair.
• ML505/ML506: GTP0 of GTP_X0Y4
• ML507: GTX0 of
GTX_X0Y5
Detailed Description
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