Event Control Register (Afio_Ec) - GigaDevice Semiconductor GD32VF103 User Manual

LK15 LK14 LK13
rw rw rw
Bits Fields
31:17 Reserved
16 LKK
15:0 LKy
7.5.8.

Event control register (AFIO_EC)

Address offset: 0x00
Reset value: 0x0000 0000
This register has to be accessed by word (32-bit).
31 30 29
15 14 13
Bits Fields
31:8 Reserved
7 EOE
6:4 PORT[2:0]
LK12 LK11 LK10 LK9
rw rw rw rw
Descriptions
Must be kept at reset value
Lock sequence key
It can only be setted using the Lock Key Writing Sequence. And can always be read.
0: GPIO_LOCK register is not locked and the port configuration is not locked.
1: GPIO_LOCK register is locked until an MCU reset..
LOCK key configuration sequence
Write 1→Write 0→Write 1→ Read 0→ Read 1
Note: The value of LK[15:0] must hold during the LOCK Key Writing sequence.
Port Lock bit y(y=0..15)
These bits are set and cleared by software
0: The corresponding bit port configuration is not locked
1: The corresponding bit port configuration is locked when LKK bit is "1"
28 27 26 25
12 11 10 9
Reserved
Descriptions
Must be kept at reset value
Event output enable
Set and cleared by software.When set the EVENTOUT RISC-V output is connected
to the I/O selected by the PORT[2:0] and PIN[3:0] bits
Event output port selection
Set and cleared by software.Select the port used to output the RISC-V EVENTOUT
signal.
000: Select PORT A
001: Select PORT B
010: Select PORT C
GD32VF103 User Manual
LK8 LK7 LK6 LK5
rw rw rw rw
24 23 22 21
Reserved
8 7 6 5
EOE PORT[2:0]
rw rw
LK4 LK3 LK2 LK1
rw rw rw rw
20 19 18 17
4 3 2 1
PIN[3:0]
rw
LK0
rw
16
0
119