GigaDevice Semiconductor GD32VF103 User Manual page 86

21 I2C0EN
20 UART4EN
19 UART3EN
18 USART2EN
17 USART1EN
16 Reserved
15 SPI2EN
14 SPI1EN
13:12 Reserved
11 WWDGTEN
10:6 Reserved
5 TIMER6EN
0: Disabled I2C1 clock
1: Enabled I2C1 clock
I2C0 clock enable
This bit is set and reset by software.
0: Disabled I2C0 clock
1: Enabled I2C0 clock
UART4 clock enable
This bit is set and reset by software.
0: Disabled UART4 clock
1: Enabled UART4 clock
UART3 clock enable
This bit is set and reset by software.
0: Disabled UART3 clock
1: Enabled UART3 clock
USART2 clock enable
This bit is set and reset by software.
0: Disabled USART2 clock
1: Enabled USART2 clock
USART1 clock enable
This bit is set and reset by software.
0: Disabled USART1 clock
1: Enabled USART1 clock
Must be kept at reset value
SPI2 clock enable
This bit is set and reset by software.
0: Disabled SPI2 clock
1: Enabled SPI2 clock
SPI1 clock enable
This bit is set and reset by software.
0: Disabled SPI1 clock
1: Enabled SPI1 clock
Must be kept at reset value
WWDGT clock enable
This bit is set and reset by software.
0: Disabled WWDGT clock
1: Enabled WWDGT clock
Must be kept at reset value
TIMER6 clock enable
GD32VF103 User Manual
86