Usart Interrupts; Table 16-3. Usart Interrupt Requests - GigaDevice Semiconductor GD32VF103 User Manual

protocol minus 12. The TC status is forced reset while the guard time counter is counting up.
When the counter reaches the programmed value TC is asserted high.
During USART transmission, if a parity error event is detected, the smartcard may NACK the
current frame by pulling down the TX pin during the last 1 bit time of the stop bits. The USART
can automatically resend data according to the protocol. The USART will not take the NACK
signal as the start bit.
During USART reception, if the parity error is detected in the current frame, the TX pin is
pulled low during the last 1 bit time of the stop bits. This signal is the NACK signal to smart
card. Then a frame error occurs in smart card side. The RBNE/receive DMA request is not
activated if the received character is erroneous. According to the protocol, the smart card can
resend the data. The NACK signal is enabled by setting the NKEN bit in USART_CTL2.
The idle frame and break frame are not applied for the Smartcard mode.
16.3.13.

USART interrupts

The USART interrupt events and flags are listed in

Table 16-3. USART interrupt requests

Transmit data buffer empty
Transmission complete
Received buff not empty
Break detected flag in LIN mode
Reception Errors (Noise flag,
overrun error, framing error) in
All of the interrupt events are ORed together before being sent to the interrupt controller, so
the USART can only generate a single interrupt request to the controller at any given time.
Software can service multiple interrupt events in a single interrupt service routine.
Interrupt event
CTS toggled flag
Overrun error
Idle frame
Parity error
DMA reception
GD32VF103 User Manual
Table 16-3. USART interrupt
Event flag
TBE
CTSF
TC
RBNE
ORERR
IDLEF
PERR
LBDF
NERR or ORERR or
FERR
Enable
Control register
Control bit
USART_CTL0 TBEIE
USART_CTL2 CTSIE
USART_CTL0
USART_CTL0 RBNEIE
USART_CTL0 IDLEIE
USART_CTL0 PERRIE
USART_CTL1 LBDIE
USART_CTL2 ERRIE
requests.
TCIE
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