Related Manuals for GigaDevice Semiconductor GD32H7 Series
Summary of Contents for GigaDevice Semiconductor GD32H7 Series
- Page 1 GigaDevice Semiconductor Inc. Precautions for the use of USBHS of GD32H7xx series Application Notes AN117...
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Page 2: Table Of Contents
AN117 Precautions for the use of USBHS of GD32H7xx series Table of Contents Table of Contents ......................2 List of Figures ........................ 3 List of Tables ........................4 Foreword ....................... 5 Precautions for the use of UBSHS ..............6 2.1. UBSHS clock configuration .................. -
Page 3: List Of Figures
AN117 Precautions for the use of USBHS of GD32H7xx series List of Figures Figure 2-1. USBHS clock tree ......................6 Figure 2-2. Internal PHY clock tree ..................... 7 Figure 2-3. USBHS VBUS Control Circuit ..................7 Figure 2-4. Control circuit of USBHS 3.3V working voltage ............8... -
Page 4: List Of Tables
AN117 Precautions for the use of USBHS of GD32H7xx series List of Tables Table 1-1. Applicable product ......................5 Table 2-1. USBHS-supported speed list..................... 7 Table 3-1. Revision history ........................ 10... -
Page 5: Foreword
AN117 Precautions for the use of USBHS of GD32H7xx series Foreword This document is intended for GD32H7xx MCU and introduces precautions during USBHS development and use, including clock configuration, GPIO configuration, PHY configuration, power supply configuration, and other software configurations. For the hardware part of USBHS, please refer to Manual of Hardware Development of AN109 GD32H7xx Seriess. -
Page 6: Precautions For The Use Of Ubshs
AN117 Precautions for the use of USBHS of GD32H7xx series Precautions for the use of UBSHS UBSHS clock configuration 2.1. Peripheral module clock 2.1.1. USBHS peripheral clock tree is as shown in tree. Figure 2-1. USBHS clock Figure 2-1. USBHS clock tree EMBPHY_HS USB HS PHY clock 24Mhz to 60Mhz CK_USBHS_ULPI... -
Page 7: Gpio Configuration Of Usbhs
AN117 Precautions for the use of USBHS of GD32H7xx series Then, the 480M clock can be used by USBHS module through USBHSxDV frequency division. Figure 2-2. Internal PHY clock tree GPIO configuration of USBHS 2.2. When enabling ADP function, it is required to configure VBUS pins (PA9 (USBHS0), PB12 (USBHS1)) in analog mode. -
Page 8: Ubshs Power Supply Configuration
AN117 Precautions for the use of USBHS of GD32H7xx series Host supported Device supported Register configuration speed speed EMBPHY_HS=0 Low-Speed (Internal FS PHY) DS = 01 (device mode) Full-Speed Full-Speed EMBPHY_FS=0 SPDFSLS = 1 (host mode) Low-Speed EMBPHY_HS=1 High-Speed DS = 00 (device mode) High-Speed (Internal HS PHY) Full-Speed... -
Page 9: Other Precautions
AN117 Precautions for the use of USBHS of GD32H7xx series Other precautions 2.5. When using internal PHY, DP/DM pins of the data lines are not required to be connected with the matching resistor in series. When using external ULPI PHY, PHY is allowed to provide 60M clock signal to MCU, but MCU is not allowed to output 60M clock signal to PHY. -
Page 10: Revision History
AN117 Precautions for the use of USBHS of GD32H7xx series Revision history Table 3-1. Revision history Revision No. Description Date Initial release Apr. 11, 2023... - Page 11 Important Notice This document is the property of GigaDevice Semiconductor Inc. and its subsidiaries (the "Company"). This document, including any product of the Company described in this document (the “Product”), is owned by the Company under the intellectual property laws and treaties of the People’s Republic of China and other jurisdictions worldwide.
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