GigaDevice Semiconductor GD32VF103 User Manual page 229

Risc-v 32-bit mcu
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Figure 15-6. Timing chart of down counting mode, PSC=0/1
TIMER_CK
CEN
CNT_CLK(PSC_CLK)
TIMERx_PSC PSC == 0
CNT_REG
Update event (UPE)
Update interrupt flag (UPIF)
TIMERx_PSC PSC == 1
CNT_CLK(PSC_CLK)
CNT_REG
Update event (UPE)
Update interrupt flag (UPIF)
GD32VF103 User Manual
05
04
03
02
01
00
Hardware set
04
03
02
01
Hardware set
63
62
61
60
5F
5E
5C 5B
00
63
62
Software clear
5A
61
229

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