Pci Initialization For The Macintosh - National Instruments PCI E Series Programmer's Manual

Register-level programmer manual, multifunction i/o boards for pci bus computers, register-level
Hide thumbs Also See for PCI E Series:
Table of Contents

Advertisement

Chapter 4
Programming

PCI Initialization for the Macintosh

1
Information on NI-DAQ function calls can be obtained from the NI-DAQ Function Reference Manual.
PCI E Series RLPM
5.
Write the window data value to offset 0xc0 from the MITE (BAR0)
address.
If you are not re-mapping the board,
Mem_Write (BAR0 + 0xc0, window_data_value)
If you are re-mapping the board
Mem_Write (0xd00c0, window_data_value)
The code provided on the companion diskette to re-map the board under the
1 MB region does not operate successfully on PCs with PCI to PCI bridge
chips. These computers include the Dell Optiplex GXpro series. You must
re-write these functions for proper operation on these systems.
The PCI E Series boards use the MITE Application Specific Integrated
Circuit (ASIC) chip as the PCI bus interface. National Instruments
designed this ASIC specifically for data acquisition. In order for the board
to operate properly this chip must be configured. Ordinarily, NI-DAQ
performs this function, but if you are not using NI-DAQ, then you must
configure the MITE ASIC chip. The following sections explain how to
accomplish this.
The initialization is done by the
consists of two parts. First, the PCI bus is scanned for all National
instruments PCI E Series boards. An NI-DAQ function
boards that contain the National Instruments vendor ID (0x1093) and
PCI E Series board ID (for example, the board ID for the
PCI-MIO-16XE-50 is 0x0162) in their configuration space. If a board is
found, the program stores pertinent information of the board into a
data structure.
Second, the MITE board windows must be configured. The NI-DAQ
function stores the
Mite_Address
at PCI configuration space 0x10 and the board address from Base Address
Register 1 located at PCI configuration space 0x14. The window is enabled
by performing a memory write to offset 0XC0 from the MITE address
(BAR0). The DAQ-STC registers can then be read or written to from the
board address (BAR1) + offset.
Setup_Mite()
from Base Address Register 0 located
4-4
function.
Setup_Mite()
1
finds all PCI
© National Instruments Corporation

Advertisement

Table of Contents
loading

Table of Contents