Table 3-1. Pci E Series Register Map - National Instruments PCI E Series Programmer's Manual

Chapter 3 Register Map and Descriptions
Register Name
Misc Register Group
Serial Command
Misc Command
Status
Analog Input Register Group
ADC FIFO Data Register
Configuration Memory Low
Configuration Memory High
Analog Output Register Group
AO Configuration
DAC FIFO Data
DAC0 Direct Data
DAC1 Direct Data
DMA Control Register Group
AI AO Select
G0 G1 Select
DAQ-STC Register Group
Window Address
Window Data
Interrupt A Acknowledge
Interrupt B Acknowledge
AI Command 2
AO Command 2
G0 Command
G1 Command
AI Status 1
AO Status 1
G Status
AI Status 2
AO Status 2
DIO Parallel Input
PCI E Series RLPM

Table 3-1. PCI E Series Register Map

Offset Address
Hex
0D
0F
01
1C
10
12
16
1E
18
1A
09
0B
0
2
4
6
8
A
C
E
4
6
8
A
C
E
3-2
Decimal Type
13 Write-only
15 Write-only
1 Read-only
28 Read-only
16 Write-only
18 Write-only
22 Write-only
30 Write-only
24 Write-only
26 Write-only
9 Write-only
11 Write-only
0 Read-and-write
2 Read-and-write
4 Write
6 Write
8 Write
10 Write
12 Write
14 Write
4 Read
6 Read
8 Read
10 Read
12 Read
14 Read
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Size
8-bit
8-bit
8-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
8-bit
8-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit
16-bit