Theory Of Operation; Functional Overview; Figure 2-1. Pci-Mio-16E-1, Pci-Mio-16E-4, And Pci-6071E Block Diagram - National Instruments PCI E Series Programmer's Manual

Register-level programmer manual, multifunction i/o boards for pci bus computers, register-level
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Theory of Operation

Functional Overview

Voltage
REF
(8)*
Analog
Muxes
(8)*
Calibration
Mux
2
Trigger Level
DACs
Trigger
PFI / Trigger
Timing
Digital I/O (8)
DAC0
DAC1
*(32) for the PCI-6071E
© National Instruments Corporation
This chapter contains a functional overview of the PCI E Series boards and
explains the operation of each functional unit making up the PCI E Series
boards.
The block diagram in Figures 2-1 through 2-5 give a functional overview
of each PCI E Series board.
Calibration
DACs
3
+
Mux Mode
Programmable
Selection
Gain
Switches
Amplifier
Analog
Trigger
Circuitry
Trigger
Counter/
Timing I/O
Digital I/O
DAC
FIFO
Calibration
4
DACs

Figure 2-1. PCI-MIO-16E-1, PCI-MIO-16E-4, and PCI-6071E Block Diagram

REF
Buffer
2
12-Bit
Sampling
ADC
A/D
FIFO
Converter
Configuration
AI Control
Memory
DMA/
Analog Input
Interrupt
Timing/Control
Request
Bus
DAQ - STC
Interface
Analog Output
RTSI Bus
Timing/Control
Interface
AO Control
Data (16)
RTSI Bus
2-1
Control
Generic
PCI
MINI
Bus
Bus
MITE
Interface
Interface
Address/Data
EEPROM
IRQ
DMA
Analog
EEPROM
DMA
Input
Control
Interface
Control
DAQ-STC
MIO
Bus
Interface
Interface
I/O
Analog
Bus
Output
Interface
Control
PCI E Series RLPM
2

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