National Instruments DAQ PCI E Series User Manual
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National Instruments DAQ PCI E Series User Manual

Pci e series multifunction i/o boards for pci bus computers
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PCI E Series
User Manual
Multifunction I/O Boards for
PCI Bus Computers
January 1999 Edition
Part Number 320945D-01
© Copyright 1995, 1999 National Instruments Corporation. All rights reserved.

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  • Page 1 PCI E Series User Manual Multifunction I/O Boards for PCI Bus Computers January 1999 Edition Part Number 320945D-01 © Copyright 1995, 1999 National Instruments Corporation. All rights reserved.
  • Page 2 Korea 02 596 7456, Mexico 5 520 2635, Netherlands 0348 433466, Norway 32 84 84 00, Singapore 2265886, Spain 91 640 0085, Sweden 08 730 49 70, Switzerland 056 200 51 51, Taiwan 02 377 1200, United Kingdom 01635 523545 National Instruments Corporate Headquarters 6504 Bridge Point Parkway Austin, TX 78730-5039 Tel: (512) 794-0100...

  • Page 3: Important Information

    The PCI E Series boards are warranted against defects in materials and workmanship for a period of one year from the date of shipment, as evidenced by receipts or other documentation. National Instruments will, at its option, repair or replace equipment that proves to be defective during the warranty period. This warranty includes parts and labor.

  • Page 4: Table Of Contents

    Introduction About the PCI E Series ....................1-1 What You Need to Get Started ..................1-2 Software Programming Choices ................... 1-2 National Instruments Application Software ........... 1-3 NI-DAQ Driver Software ................1-3 Register-Level Programming ................. 1-5 Optional Equipment ...................... 1-5 Custom Cabling ......................
  • Page 5 Timing Connections ..................... 4-26 Programmable Function Input Connections ..........4-27 DAQ Timing Connections ................4-28 SCANCLK Signal ................4-29 EXTSTROBE* Signal ..............4-29 TRIG1 Signal................... 4-30 TRIG2 Signal................... 4-31 STARTSCAN Signal............... 4-33 PCI E Series User Manual © National Instruments Corporation...
  • Page 6 Loading Calibration Constants ..................5-1 Self-Calibration......................5-2 External Calibration ...................... 5-2 Other Considerations ....................5-3 Appendix A Specifications Appendix B Optional Cable Connector Descriptions Appendix C Common Questions Appendix D Customer Communication © National Instruments Corporation PCI E Series User Manual...
  • Page 7 Figure 4-13. Typical Pretriggered Acquisition ............4-29 Figure 4-14. SCANCLK Signal Timing ..............4-29 Figure 4-15. EXTSTROBE* Signal Timing .............. 4-30 Figure 4-16. TRIG1 Input Signal Timing ..............4-31 Figure 4-17. TRIG1 Output Signal Timing..............4-31 PCI E Series User Manual viii © National Instruments Corporation...
  • Page 8 PCI-MIO-16XE-50, PCI-6031E, PCI-6032E, and PCI-6033E ..... 3-8 Table 4-1. I/O Signal Summary, PCI-MIO-16E-1, PCI-MIO-16E-4, and PCI-6071E..................4-7 Table 4-2. I/O Signal Summary, PCI-MIO-16XE-10, PCI-6031E, PCI-6032E, and PCI-6033E..............4-8 Table 4-3. I/O Signal Summary, PCI-MIO-16XE-50 ..........4-10 © National Instruments Corporation PCI E Series User Manual...

  • Page 9: About This Manual

    Chapter 2, Installation and Configuration, explains how to install • and configure your PCI E Series board. • Chapter 3, Hardware Overview, presents an overview of the hardware functions on your PCI E Series board. © National Instruments Corporation PCI E Series User Manual...

  • Page 10: Conventions Used In This Manual

    PCI E Series board. • Appendix D, Customer Communication, contains forms you can use to request help from National Instruments or to comment on our products. • The Glossary contains an alphabetical list and description of terms used in this manual, including acronyms, abbreviations, definitions metric prefixes, mnemonics, and symbols.

  • Page 11: National Instruments Documentation

    Refers to all PC AT series computers with PCI bus unless otherwise noted. SCXI SCXI stands for Signal Conditioning eXtensions for Instrumentation and is a National Instruments product line designed to perform front-end signal conditioning for National Instruments plug-in DAQ boards. The Glossary lists abbreviations, acronyms, metric prefixes, mnemonics, symbols, and terms.

  • Page 12: Related Documentation

    Related Documentation The following documents contain information you may find helpful: • DAQ-STC Technical Reference Manual National Instruments Application Note 025, Field Wiring and Noise • Considerations for Analog Signals • PCI Local Bus Specification Revision 2.0 The following National Instruments manual contains detailed information for the register-level programmer: •...

  • Page 13: Customer Communication

    Customer Communication National Instruments wants to receive your comments on our products and manuals. We are interested in the applications you develop with our products, and we want to help if you have problems with them. To make it easy for you to contact us, this manual contains comment and configuration forms for you to complete.

  • Page 15: Introduction

    PCI E Series board. About the PCI E Series Thank you for buying a National Instruments PCI E Series board. The PCI E Series boards are completely Plug and Play, multifunction analog, digital, and timing I/O boards for PCI bus computers. This...

  • Page 16: What You Need To Get Started

    VirtualBench Your computer Software Programming Choices You have several options to choose from when programming your National Instruments DAQ and SCXI hardware. You can use National Instruments application software, NI-DAQ, or register-level programming. PCI E Series User Manual © National Instruments Corporation...

  • Page 17: National Instruments Application Software

    The LabVIEW Data Acquisition VI Library, a series of VIs for using LabVIEW with National Instruments DAQ hardware, is included with LabVIEW. The LabVIEW Data Acquisition VI Library is functionally equivalent to NI-DAQ software.

  • Page 18: Figure 1-1. The Relationship Between The Programming Environment

    An example of a low-level function is writing directly to registers on the DAQ device. NI-DAQ does not sacrifice the performance of National Instruments DAQ devices because it lets multiple devices operate at their peak.

  • Page 19: Register-Level Programming

    DAQ hardware is easier than, and as flexible as, register-level programming, and can save weeks of development time. Optional Equipment National Instruments offers a variety of products to use with your PCI E Series board, including cables, connector blocks, and other accessories, as follows: •...

  • Page 20: Custom Cabling

    Chapter 1 Introduction Custom Cabling National Instruments offers cables and accessories for you to prototype your application or to use if you frequently change board interconnections. If you want to develop your own cable, however, the following guidelines may be useful: •...

  • Page 21: Unpacking

    Notify National Instruments if the board appears damaged in any way. Do not install a damaged board into your computer. Never touch the exposed pins of connectors. • © National Instruments Corporation PCI E Series User Manual...

  • Page 22: Installation And Configuration

    1. Write down the PCI E Series board serial number in the PCI E Series Hardware and Software Configuration Form in Appendix D, Customer Communication, of this manual. 2. Turn off and unplug your computer. © National Instruments Corporation PCI E Series User Manual...

  • Page 23: Board Configuration

    Refer to your software documentation for configuration instructions. Board Configuration Due to the National Instruments standard architecture for data acquisition and the PCI bus specification, the PCI E Series boards are completely software configurable. You must perform two types of configuration on the PCI E Series boards—bus-related and data...

  • Page 24: Hardware Overview

    Timing/Control Interface Interface Digital I/O (8) Control AO Control DAC0 Data (16) FIFO DAC1 Calibration RTSI Bus DACs * (32) for the PCI-6071E Figure 3-1. PCI-MIO-16E-1, PCI-MIO-16E-4 and PCI-6071E Block Diagram © National Instruments Corporation PCI E Series User Manual...

  • Page 25: Figure 3-2. Pci-Mio-16Xe-10 And Pci-6031E Block Diagram

    Digital I/O (8) Digital I/O Output Timing/Control Interface Interface Control AO Control DAC0 Data (16) FIFO DAC1 Calibration RTSI Bus DACs * (32) for the PCI-6031E Figure 3-2. PCI-MIO-16XE-10 and PCI-6031E Block Diagram PCI E Series User Manual © National Instruments Corporation...

  • Page 26: Figure 3-3. Pci-6032E And Pci-6033E Block Diagram

    DAQ - STC Control Timing Interface Timing I/O Analog Output RTSI Bus Digital I/O Timing/Control Interface Digital I/O (8) * (32) for the PCI-6033E RTSI Bus Figure 3-3. PCI-6032E and PCI-6033E Block Diagram © National Instruments Corporation PCI E Series User Manual...

  • Page 27: Analog Input

    (NRSE) input, referenced single-ended (RSE) input, and differential (DIFF) input. The single-ended input configurations provide up to 16 channels (64 channels on the PCI-6031E, PCI-6033E, and PCI-6071E). The DIFF input PCI E Series User Manual © National Instruments Corporation...

  • Page 28: Input Polarity And Input Range

    –V /2 and + V /2. So, these boards have a unipolar input range of 10 V (0 to 10 V) and a bipolar input range of 10 V (±5 V). © National Instruments Corporation PCI E Series User Manual...
  • Page 29 The value of 1 LSB of the 12-bit ADC; that is, the voltage increment corresponding to a change of one count in the ADC 12-bit count. Note: See Appendix A, Specifications, for absolute maximum ratings. PCI E Series User Manual © National Instruments Corporation...
  • Page 30 100 and the other boards have gains of 1, 2, 5, 10, 20, 50, and 100. These gains are suited for a wide variety of signal levels. With the proper gain setting, you can use the full resolution of the ADC to measure the input signal. © National Instruments Corporation PCI E Series User Manual...

  • Page 31: Considerations For Selecting Input Ranges

    For example, if you are certain the input signal will not be negative (below 0 V), unipolar input polarity is best. However, if the signal is negative or equal to zero, you will get inaccurate readings if you use unipolar input polarity. PCI E Series User Manual © National Instruments Corporation...

  • Page 32: Dither

    Dither has the effect of forcing quantization noise to become a zero-mean random variable rather than a deterministic function of the input signal. © National Instruments Corporation PCI E Series User Manual...

  • Page 33: Multichannel Scanning Considerations

    The settling time for the very high-speed boards is gain dependent, which can affect the useful sampling rate for a given gain. No extra settling time is necessary PCI E Series User Manual 3-10 © National Instruments Corporation...
  • Page 34 (for example, 100 points from channel 0, then 100 points from channel 1, then 100 points from channel 2, and so on). © National Instruments Corporation 3-11 PCI E Series User Manual...

  • Page 35: Analog Output

    +10 V onboard reference or an externally supplied reference within ±11 V. You do not need to configure both channels for the same range. PCI E Series User Manual 3-12 © National Instruments Corporation...

  • Page 36: Analog Output Reglitch Selection

    Notice that this reglitch circuit does not eliminate the glitches; it only makes them more uniform in size. Reglitching is normally disabled at startup and your software can independently enable each channel. © National Instruments Corporation 3-13 PCI E Series User Manual...

  • Page 37: Analog Trigger

    (less than 1 k source impedance) if you plan to enable this input via software. Analog Input PGIA Channels Analog Trigger DAQ-STC Circuit PFI0/TRIG1 Figure 3-6. Analog Trigger Block Diagram PCI E Series User Manual 3-14 © National Instruments Corporation...

  • Page 38: Figure 3-7. Below-Low-Level Analog Triggering Mode

    Figure 3-7. Below-Low-Level Analog Triggering Mode In above-high-level analog triggering mode, the trigger is generated when the signal value is greater than highValue. LowValue is unused. highValue Trigger Figure 3-8. Above-High-Level Analog Triggering Mode © National Instruments Corporation 3-15 PCI E Series User Manual...

  • Page 39: Figure 3-9. Inside-Region Analog Triggering Mode

    Trigger Figure 3-10. High-Hysteresis Analog Triggering Mode In low-hysteresis analog triggering mode, the trigger is generated when the signal value is less than lowValue, with the hysteresis specified by highValue. PCI E Series User Manual 3-16 © National Instruments Corporation...

  • Page 40: Digital I/O

    RTSI bus to interconnect timing signals between boards, and the Programmable Function Input (PFI) pins on the I/O connector to connect the board to external circuitry. These connections are designed © National Instruments Corporation 3-17 PCI E Series User Manual...

  • Page 41: Figure 3-12. Convert* Signal Routing

    Many of these timing signals are also available as outputs on the RTSI pins, as indicated in the RTSI Triggers section later in this chapter, and on the PFI pins, as indicated in Chapter 4, Signal Connections. PCI E Series User Manual 3-18 © National Instruments Corporation...

  • Page 42: Programmable Function Inputs

    These bidirectional lines can drive any of eight timing signals onto the RTSI bus and can receive any of these timing signals. This signal connection scheme is shown in Figure 3-13. © National Instruments Corporation 3-19 PCI E Series User Manual...

  • Page 43: Figure 3-13. Rtsi Bus Signal Connection

    RTSI_OSC (20 MHz) Figure 3-13. RTSI Bus Signal Connection Refer to the Timing Connections section of Chapter 4, Signal Connections, for a description of the signals shown in Figure 3-13. PCI E Series User Manual 3-20 © National Instruments Corporation...

  • Page 44: Signal Connections

    PCI E Series boards can damage the PCI E Series board and the computer. Maximum input ratings for each signal are given in the Protection column of Tables 4-1, 4-2, and 4-3. National Instruments is liable for any damages resulting from such signal connections.

  • Page 45: Figure 4-1. I/O Connector Pin Assignment For The Pci-Mio-16E-1

    GPCTR0_OUT DGND FREQ_OUT DGND Not available on the PCI-6032E Not available on the PCI-MIO-16XE-10, PCI-MIO-16XE-50, or PCI-6032E Figure 4-1. I/O Connector Pin Assignment for the PCI-MIO-16E-1, PCI-MIO-16E-4, PCI-MIO-16XE-50, PCI-MIO-16XE-10, and PCI-6032E PCI E Series User Manual © National Instruments Corporation...

  • Page 46: Figure 4-2. I/O Connector Pin Assignment For The Pci-6071E, 6031E, And 6033E

    ACH54 PFI9/GPCTR0_GATE ACH62 GPCTR0_OUT ACH55 FREQ_OUT ACH63 Not available on the PCI-6033E Not available on the PCI-6031E or PCI-6033E Figure 4-2. I/O Connector Pin assignment for the PCI-6071E, 6031E, and 6033E © National Instruments Corporation PCI E Series User Manual...

  • Page 47: I/O Connector Signal Descriptions

    Digital Ground—This pin supplies the reference for the digital signals at the I/O connector as well as the +5 VDC supply. All three ground references—AIGND, AOGND, and DGND—are connected together on your PCI E Series board. PCI E Series User Manual © National Instruments Corporation...
  • Page 48 PFI3/Counter 1 Source—As an input, this is one of the PFIs. Output As an output, this is the GPCTR1_SOURCE signal. This signal reflects the actual source connected to the general-purpose counter 1. © National Instruments Corporation PCI E Series User Manual...
  • Page 49 0. GPCTR0_OUT DGND Output Counter 0 Output—This output is from the general-purpose counter 0 output. FREQ_OUT DGND Output Frequency Output—This output is from the frequency generator output. PCI E Series User Manual © National Instruments Corporation...
  • Page 50 10 k PFI1/TRIG2 — V cc +0.5 3.5 at (V cc -0.4) 5 at 0.4 50 k pu PFI2/CONVERT* — +0.5 3.5 at (V -0.4) 5 at 0.4 50 k pu © National Instruments Corporation PCI E Series User Manual...
  • Page 51 V) (ns) ACH<0..63> 100 G 25/15 — — — ±1 nA in parallel with 100 pF AISENSE, AISENSE2 100 G 25/15 — — — ±1 nA in parallel with 100 pF PCI E Series User Manual © National Instruments Corporation...
  • Page 52 50 k pu PFI8/GPCTR0_SOURCE — V cc +0.5 3.5 at (V cc -0.4) 5 at 0.4 50 k pu PFI9/GPCTR0_GATE — +0.5 3.5 at (V -0.4) 5 at 0.4 50 k pu © National Instruments Corporation PCI E Series User Manual...
  • Page 53 5 at -10 5 at -10 2 V/µs — to ground AOGND — — — — — — DGND — — — — — — Short-circuit — — — to ground PCI E Series User Manual 4-10 © National Instruments Corporation...
  • Page 54 — 3.5 at (V -0.4) 5 at 0.4 50 k pu AI = Analog Input DIO = Digital Input/Output pu = pullup AO = Analog Output DO = Digital Output © National Instruments Corporation 4-11 PCI E Series User Manual...

  • Page 55: Analog Input Signal Connections

    Exceeding the differential and common-mode input ranges distorts your input signals. Exceeding the maximum input voltage rating can damage the PCI E Series board and the computer. National Instruments is liable for any damages resulting from such signal connections. The maximum input voltage ratings are listed in the Protection column of Tables 4-1 to 4-3.

  • Page 56: Figure 4-3. Pci E Series Pgia

    Nonreferenced or Floating Signal Sources section later in this chapter). If you have a grounded source, you should not reference the signal to AIGND. You can avoid this reference by using DIFF or NRSE input configurations. © National Instruments Corporation 4-13 PCI E Series User Manual...

  • Page 57: Types Of Signal Sources

    You can configure your PCI E Series board for one of three input modes—NRSE, RSE, or DIFF. The following sections discuss the use of single-ended and differential measurements and considerations for measuring both floating and ground-referenced signal sources. PCI E Series User Manual 4-14 © National Instruments Corporation...

  • Page 58: Figure 4-4. Summary Of Analog Input Connections

    Ground-loop losses, V , are added to measured signal Single-Ended — AISENSE AISENSE Nonreferenced (NRSE) AIGND AIGND See text for information on bias resistors. Figure 4-4. Summary of Analog Input Connections © National Instruments Corporation 4-15 PCI E Series User Manual...

  • Page 59: Differential Connection Considerations (Diff Input Configuration)

    The signal leads travel through noisy environments. Differential signal connections reduce picked up noise and increase common-mode noise rejection. Differential signal connections also allow input signals to float within the common-mode limits of the PGIA. PCI E Series User Manual 4-16 © National Instruments Corporation...

  • Page 60: Differential Connections For Ground-Referenced Signal Sources

    With this type of connection, the PGIA rejects both the common-mode noise in the signal and the ground potential difference between the signal source and the PCI E Series board ground, shown as V Figure 4-5. © National Instruments Corporation 4-17 PCI E Series User Manual...

  • Page 61: Differential Connections For Nonreferenced Or Floating Signal Sources

    You must reference the source to AIGND. The easiest way is simply to connect the positive side of the signal to the positive input of the PGIA and connect the negative side of the PCI E Series User Manual 4-18 © National Instruments Corporation...
  • Page 62 © National Instruments Corporation 4-19 PCI E Series User Manual...

  • Page 63: Single-Ended Connection Considerations

    The coupling is the result of differences in the signal path. Magnetic coupling is proportional to the area between the two signal conductors. Electrical coupling is a function of how much the electric field differs between the two conductors. PCI E Series User Manual 4-20 © National Instruments Corporation...

  • Page 64: Single-Ended Connections For Floating Signal Sources (Rse Configuration)

    PCI E Series board were referenced to ground, in this situation as in the RSE input configuration, this difference in ground potentials would appear as an error in the measured voltage. © National Instruments Corporation 4-21 PCI E Series User Manual...

  • Page 65: Common-Mode Signal Rejection Considerations

    ) must be within ±26 V of AIGND. At gains of 10 and 100, this is roughly equivalent to restricting the two input voltages to within ±8 V of AIGND. PCI E Series User Manual 4-22 © National Instruments Corporation...

  • Page 66: Analog Output Signal Connections

    Usable input voltage range: ±11 V peak with respect to AOGND • Absolute maximum ratings: ±15 V peak with respect to AOGND AOGND is the ground reference signal for both analog output channels and the external reference signal. © National Instruments Corporation 4-23 PCI E Series User Manual...

  • Page 67: Digital I/O Signal Connections

    Caution: Exceeding the maximum input voltage ratings, which are listed in Tables 4-1, 4-2, and 4-3 can damage the PCI E Series board and the computer. National Instruments is liable for any damages resulting from such signal connections. PCI E Series User Manual 4-24 ©...

  • Page 68: Figure 4-10. Digital I/O Connections

    TTL signals and sensing external device states such as the state of the switch shown in the figure. Digital output applications include sending TTL signals and driving external devices such as the LED shown in the figure. © National Instruments Corporation 4-25 PCI E Series User Manual...

  • Page 69: Power Connections

    PCI E Series board or any other device. Doing so can damage the PCI E Series board and the computer. National Instruments is liable for damages resulting from such a connection.

  • Page 70: Programmable Function Input Connections

    You can individually enable each of the PFI pins to output a specific internal timing signal. For example, if you need the CONVERT* signal as an output on the I/O connector, software can turn on the output driver © National Instruments Corporation 4-27 PCI E Series User Manual...

  • Page 71: Daq Timing Connections

    Figure 4-13 shows a typical pretriggered DAQ sequence. The description for each signal shown in these figures is included later in this chapter. TRIG1 STARTSCAN CONVERT* Scan Counter Figure 4-12. Typical Posttriggered Acquisition PCI E Series User Manual 4-28 © National Instruments Corporation...

  • Page 72: Scanclk Signal

    In the single-pulse mode, software controls the level of the EXTSTROBE* signal. A 10 µs and a 1.2 µs clock are available for generating a sequence of eight pulses in the hardware-strobe mode. © National Instruments Corporation 4-29 PCI E Series User Manual...

  • Page 73: Trig1 Signal

    This is true even if the acquisition is being externally triggered by another PFI. The output is an active high pulse with a pulse width of 50 to 100 ns. This output is set to tri-state at startup. PCI E Series User Manual 4-30 © National Instruments Corporation...

  • Page 74: Trig2 Signal

    The selected edge of the TRIG2 signal initiates the posttriggered phase of a pretriggered acquisition sequence. In pretriggered mode, the TRIG1 signal initiates the data acquisition. The scan counter indicates the minimum number © National Instruments Corporation 4-31 PCI E Series User Manual...

  • Page 75: Figure 4-18. Trig2 Input Signal Timing

    Figures 4-18 and 4-19 show the input and output timing requirements for the TRIG2 signal. Rising-edge polarity Falling-edge polarity = 10 ns minimum Figure 4-18. TRIG2 Input Signal Timing = 50-100 ns Figure 4-19. TRIG2 Output Signal Timing PCI E Series User Manual 4-32 © National Instruments Corporation...

  • Page 76: Startscan Signal

    Figures 4-20 and 4-21 show the input and output timing requirements for the STARTSCAN signal. Rising-edge polarity Falling-edge polarity = 10 ns minimum Figure 4-20. STARTSCAN Input Signal Timing © National Instruments Corporation 4-33 PCI E Series User Manual...

  • Page 77: Convert* Signal

    DAQ sequence may be gated by either the hardware (AIGATE) signal or software command register gate. CONVERT* Signal Any PFI pin can externally input the CONVERT* signal, which is available as an output on the PFI2/CONVERT* pin. PCI E Series User Manual 4-34 © National Instruments Corporation...

  • Page 78: Figure 4-22. Convert* Input Signal Timing

    The ADC switches to hold mode within 60 ns of the selected edge. This hold-mode delay time is a function of temperature and does not vary from one conversion to the next. Separate the CONVERT* pulses by at least one conversion period. © National Instruments Corporation 4-35 PCI E Series User Manual...

  • Page 79: Aigate Signal

    STARTSCAN signal. You must configure the PFI pin you select as the source for the SISOURCE signal in the level-detection mode. You can configure the polarity selection for the PFI pin for either active high or active low. PCI E Series User Manual 4-36 © National Instruments Corporation...

  • Page 80: Waveform Generation Timing Connections

    PFI. The output is an active high pulse with a pulse width of 50 to 100 ns. This output is set to tri-state at startup. © National Instruments Corporation 4-37 PCI E Series User Manual...

  • Page 81: Update* Signal

    DACs. This is true even if the updates are being externally generated by another PFI. The output is an active low pulse with a pulse width of 300 to 350 ns. This output is set to tri-state at startup. PCI E Series User Manual 4-38 © National Instruments Corporation...

  • Page 82: Uisource Signal

    UISOURCE signal in the level-detection mode. You can configure the polarity selection for the PFI pin for either active high or active low. Figure 4-29 shows the timing requirements for the UISOURCE signal. © National Instruments Corporation 4-39 PCI E Series User Manual...

  • Page 83: General-Purpose Timing Signal Connections

    As an output, the GPCTR0_SOURCE signal reflects the actual clock connected to general-purpose counter 0. This is true even if another PFI is externally inputting the source clock. This output is set to tri-state at startup. PCI E Series User Manual 4-40 © National Instruments Corporation...

  • Page 84: Gpctr0_Gate Signal

    As an output, the GPCTR0_GATE signal reflects the actual gate signal connected to general-purpose counter 0. This is true even if the gate is being externally generated by another PFI. This output is set to tri-state at startup. © National Instruments Corporation 4-41 PCI E Series User Manual...

  • Page 85: Gpctr0_Out Signal

    You can disable this input so that software can control the up-down functionality and leave the DIO6 pin free for general use. PCI E Series User Manual 4-42 © National Instruments Corporation...

  • Page 86: Gpctr1_Source Signal

    You can select any PFI pin as the source for GPCTR1_GATE and configure the polarity selection for either rising or falling edge. You can use the gate signal in a variety of different applications to perform such © National Instruments Corporation 4-43 PCI E Series User Manual...

  • Page 87: Gpctr1_Out Signal

    This output is set to tri-state at startup. Figure 4-35 shows the timing requirements for the GPCTR1_OUT signal. GPCTR1_SOURCE GPCTR1_OUT (Pulse on TC) GPCTR1_OUT (Toggle output on TC) Figure 4-35. GPCTR1_OUT Signal Timing PCI E Series User Manual 4-44 © National Instruments Corporation...

  • Page 88: Gpctr1_Up_Down Signal

    SOURCE input or to one of the internally generated signals on your PCI E Series board. Figure 4-36 shows the GATE signal referenced to the rising edge of a source signal. The gate must be valid (either high or © National Instruments Corporation 4-45 PCI E Series User Manual...

  • Page 89: Freq_Out Signal

    With this type of wire, the signals attached to the CH+ and CH- inputs are twisted together and then covered with a shield. You then connect this shield only at one PCI E Series User Manual 4-46 © National Instruments Corporation...
  • Page 90 For more information, refer to the application note, Field Wiring and Noise Consideration for Analog Signals, available from National Instruments. © National Instruments Corporation 4-47 PCI E Series User Manual...

  • Page 91: Calibration

    In the EEPROM there is a user-modifiable calibration area in addition to the permanent factory calibration area. This means that you can load the CalDACs with values either from the original factory calibration or from a calibration that you subsequently performed. © National Instruments Corporation PCI E Series User Manual...

  • Page 92: Self-Calibration

    Your PCI E Series board can measure and correct for almost all of its calibration-related errors without any external signal connections. Your National Instruments software provides a self-calibration method. This self-calibration process, which generally takes less than a minute, is the preferred method of assuring accuracy in your application.

  • Page 93: Other Considerations

    In this case, it is advisable to account for the nominal gain error of the analog output channel either in software or with external hardware. See Appendix A, Specifications, for analog output gain error information. © National Instruments Corporation PCI E Series User Manual...

  • Page 94: Appendix A Specifications

    Type of ADC ........Successive approximation Resolution...........12 bits, 1 in 4,096 Max sampling rate (single-channel) PCI-MIO-16E-1, PCI-6071E ..1.25 MS/s PCI-MIO-16E-4 ......500 kS/s 1. See settling time table in Dynamic Characteristics for multichannel rates. © National Instruments Corporation PCI E Series User Manual...
  • Page 95 Overvoltage protection ....... ±25 V powered on, ±15 V powered off Inputs protected PCI-MIO-16E-1, PCI-MIO-16E-4 ....ACH<0..15>, AISENSE PCI-6071E ......ACH<0..63>, AISENSE, AISENSE2 FIFO buffer size ......... 512 S Data transfers ........DMA, interrupts, programmed I/O PCI E Series User Manual © National Instruments Corporation...
  • Page 96 Amplifier Characteristics Input impedance Normal powered on ......100 G in parallel with 100 pF Powered off ........820 min. Overload ........820 min. Input bias current ........±200 pA Input offset current ......±100 pA © National Instruments Corporation PCI E Series User Manual...
  • Page 97 1.5 µS typ, 0.9 µS typ, 3 µS max 2 µS max 1 µS max 2 µS typ, 1.5 µS typ, 1 µS typ, 3 µS max 2 µS max 1.5 µS max PCI E Series User Manual © National Instruments Corporation...
  • Page 98 System noise (LSBrms, not including quantization) Board Gain Dither Off Dither On PCI-MIO-16E-1, 0.5 to 10 0.25 PCI-6071E PCI-MIO-16E-4 0.5 to 5 0.15 10 to 20 0.35 Crosstalk ..........–80 dB, DC to 100 kHz © National Instruments Corporation PCI E Series User Manual...
  • Page 99 2 channel ........600 kS/s–1 MS/s (system-dependent) Type of DAC ........Double-buffered, multiplying FIFO buffer size PCI-MIO-16E-1, PCI-6071E ..2,048 S PCI-MIO-16E-4......512 S Data transfers ........DMA, interrupts, programmed I/O DMA modes ........Scatter gather PCI E Series User Manual © National Instruments Corporation...
  • Page 100 Ranges ..........±10 V, 0 to 10 V, ±EXTREF, 0 to EXTREF (software selectable) Output coupling ........DC Output impedance .......0.1 Current drive........±5 mA max Protection ..........Short-circuit to ground Power-on state ........0 V External reference input Range ...........±11 V © National Instruments Corporation PCI E Series User Manual...
  • Page 101 Duration ........1.5 µs Stability Offset temperature coefficient .... ±50 µV/°C Gain temperature coefficient Internal reference......±25 ppm/°C External reference ....... ±25 ppm/°C Digital I/O Number of channels ......8 input/output Compatibility ........TTL/CMOS PCI E Series User Manual © National Instruments Corporation...
  • Page 102 Base clocks available Counter/timers ......20 MHz, 100 kHz Frequency scaler ......10 MHz, 100 kHz Base clock accuracy ......±0.01% Max source frequency ......20 MHz Min source pulse duration ....10 ns, edge-detect mode © National Instruments Corporation PCI E Series User Manual...
  • Page 103 Coupling........DC Protection ........–0.5 to V + 0.5 V when configured as a digital signal, ±35 V when configured as an analog trigger signal or disabled, ±35 V powered off PCI E Series User Manual A-10 © National Instruments Corporation...

  • Page 104: Bus Interface

    PCI-MIO-16E-4 ......0.9 A Power available at I/O connector ..+4.65 to +5.25 VDC at 1 A Physical Dimensions (not including connectors) ....17.5 by 10.6 cm (6.9 by 4.2 in) I/O connector © National Instruments Corporation A-11 PCI E Series User Manual...
  • Page 105 PCI-MIO-16E-4......68-pin male SCSI-II type PCI-6071E ........100-pin female 0.05 D-type Environment Operating temperature ......0° to 55° C Storage temperature ......–55° to 150° C Relative humidity ....... 5% to 90% noncondensing PCI E Series User Manual A-12 © National Instruments Corporation...

  • Page 106: Input Characteristics

    0 to 1 V ±0.5 V 0 to 0.5 V ±0.2 V 0 to 0.2 V ±0.1 V 0 to 0.1 V 1. See settling time table in Dynamic Characteristics for multichannel rates. © National Instruments Corporation A-13 PCI E Series User Manual...
  • Page 107 After calibration (gain = 1) ..±30.5 ppm of reading max Before calibration ......±2,150 ppm of reading max With gain error adjusted to 0 at gain = 1 Gain 1........±200 ppm of reading max PCI E Series User Manual A-14 © National Instruments Corporation...

  • Page 108: Input Impedance

    ±0.0061% Board (±0.5 LSB) (±1 LSB) (±4 LSB) PCI-MIO-16XE-10 40 µs max 20 µs max 10 µs max PCI-6032E PCI-6031E 50 µs max 25 µs max 10 µs max PCI-6033E © National Instruments Corporation A-15 PCI E Series User Manual...

  • Page 109: Offset Temperature Coefficient

    Resolution .......... 16 bits, 1 in 65,536 Max update rate........100 kS/s Type of DAC ........Double-buffered FIFO buffer size ......... 2,048 S Data transfers ........DMA, interrupts, programmed I/O DMA modes ........Scatter gather PCI E Series User Manual A-16 © National Instruments Corporation...

  • Page 110: Noise

    Settling time for full-scale step ...10 µs to ±1 LSB accuracy Slew rate ..........5 V/µs Noise ..........60 µVrms, DC to 1 MHz Stability Offset temperature coefficient.....±50 µV/°C Gain temperature coefficient ....±7.5 ppm/°C © National Instruments Corporation A-17 PCI E Series User Manual...

  • Page 111: Number Of Channels

    1 frequency scaler Resolution Counter/timers ......24 bits Frequency scaler......4 bits Compatibility ........TTL/CMOS Base clocks available Counter/timers ......20 MHz, 100 kHz Frequency scaler......10 MHz, 100 kHz PCI E Series User Manual A-18 © National Instruments Corporation...
  • Page 112 Impedance ........10 k Coupling ........DC Protection ........0.5 to Vcc +0.5 V when configured as a digital signal; ±35 V when configured as an analog signal or disabled; ±35 V powered off © National Instruments Corporation A-19 PCI E Series User Manual...
  • Page 113 +5 VDC (±5%) ........1.5 A Power available at I/O connector..+4.65 to +5.25 VDC at 1 A Physical Dimensions (not including connectors) ....33.8 by 9.9 cm (13.3 by 3.9 in) I/O connector PCI-MIO-16XE-10, PCI E Series User Manual A-20 © National Instruments Corporation...
  • Page 114 PCI-6032E ........68-pin male SCSI-II type PCI-6031E, PCI-6033E ....100-pin female 0.05 D-type Environment Operating temperature ......0 to 55° C Storage temperature ......–55 to 150° C Relative humidity .......5% to 90% noncondensing © National Instruments Corporation A-21 PCI E Series User Manual...
  • Page 115 (signal and common mode)..The common-mode signal (the average of two signals in a differential pair) should remain within ±8 V of ground, and each input should remain within ±11 V of ground. PCI E Series User Manual A-22 © National Instruments Corporation...
  • Page 116 Gain = 2, 10 .........±100 ppm of reading Gain = 100 ........±2250 ppm of reading Amplifier Characteristics Input impedance Normal, powered on .....7 G in parallel with 100 pF Powered off ........820 Overload ........820 © National Instruments Corporation A-23 PCI E Series User Manual...
  • Page 117 Crosstalk ..........–85 dB max, DC to 20 kHz Stability Offset temperature coefficient Pregain ........±1 µV/°C Postgain........±12 µV/°C Gain temperature coefficient ....±5 ppm/°C Analog Output Output Characteristics Number of channels ......2 PCI E Series User Manual A-24 © National Instruments Corporation...
  • Page 118 After calibration ......±0.01% of output max Before calibration......±1% of output max Voltage Output Range..........±10 V Output coupling ........DC Output impedance .......0.1 Current drive........±5 mA Protection ..........Short-circuit to ground Power-on state ........0 V (± 85 mV) © National Instruments Corporation A-25 PCI E Series User Manual...

  • Page 119: Glitch Energy (At Midscale Transition) Magnitude

    -320 µA Input high current — 10 µA Output low voltage = 24 mA) — 0.4 V Output high voltage = 13 mA) 4.35 V — Power-on state........Input (High-Z) PCI E Series User Manual A-26 © National Instruments Corporation...
  • Page 120 Min gate pulse duration .....10 ns, edge-detect mode Data transfers........DMA, interrupts, programmed I/O DMA modes ........Scatter-gather Triggers Digital Trigger Compatibility ........TTL Response..........Rising or falling edge Pulse width .........10 ns min RTSI Trigger Lines ........7 © National Instruments Corporation A-27 PCI E Series User Manual...
  • Page 121 (not including connectors) ....17.5 by 9.9 cm (6.9 by 3.9 in) I/O connector ........68-pin male SCSI-II type Environment Operating temperature ......0 to 55° C Storage temperature ......–55 to 150° C Relative humidity ....... 5% to 90% noncondensing PCI E Series User Manual A-28 © National Instruments Corporation...
  • Page 122 R6868 cable assemblies with the PCI-MIO-16E-1, PCI-MIO-16E-4, PCI-MIO-16XE-10, PCI-MIO-16XE-50, and PCI-6032E. It is also one of the two 68-pin connectors available when you use the SH1006868 cable assembly with the PCI-6031E, PCI-6033E, or PCI-6071E. © National Instruments Corporation PCI E Series User Manual...

  • Page 123: Figure B-1. 68-Pin E Series Connector Pin Assignments

    PFI7/STARTSCAN PFI9/GPCTR0_GATE PFI8/GPCTR0_SOURCE GPCTR0_OUT DGND FREQ_OUT DGND Not available on the PCI-6032E or PCI-6033E Not available on the PCI-MIO-16XE-10, PCI-MIO-16XE-50, PCI-6032E, or PCI-6033E Figure B-1. 68-Pin E Series Connector Pin Assignments PCI E Series User Manual © National Instruments Corporation...

  • Page 124: Figure B-2. 68-Pin Extended Analog Input Connector Pin Assignments

    13 47 ACH 60 ACH 61 12 46 ACH 53 ACH 54 11 45 ACH 62 ACH 55 10 44 ACH 63 Figure B-2. 68-Pin Extended Analog Input Connector Pin Assignments © National Instruments Corporation PCI E Series User Manual...

  • Page 125: Figure B-3. 50-Pin E Series Connector Pin Assignments

    PFI9/GPCTR0_GATE PFI8/GPCTR0_SOURCE 49 50 GPCTR0_OUT FREQ_OUT Not available on the PCI-6032E or PCI-6033E Not available on the PCI-MIO-16XE-10, PCI-MIO-16XE-50, PCI-6031E, PCI-6032E, or PCI-6033E Figure B-3. 50-Pin E Series Connector Pin Assignments PCI E Series User Manual © National Instruments Corporation...

  • Page 126: Figure B-4. 50-Pin Extended Analog Input Connector Pin Assignments

    39 40 ACH58 ACH51 41 42 ACH59 ACH52 43 44 ACH60 ACH53 45 46 ACH61 ACH54 47 48 ACH62 ACH55 49 50 ACH63 Figure B-4. 50-Pin Extended Analog Input Connector Pin Assignments © National Instruments Corporation PCI E Series User Manual...

  • Page 127: General Information

    What is the DAQ-STC? The DAQ-STC is the system timing control application-specific integrated circuit (ASIC) designed by National Instruments and is the backbone of the PCI E Series boards. The DAQ-STC contains seven 24-bit counters and three 16-bit counters. The counters are divided into the following three groups: •...
  • Page 128 What jumpers should I be aware of when configuring my PCI E Series board? The PCI E Series boards are jumperless and switchless. Which National Instruments document should I read first to get started using DAQ software? Your NI-DAQ or application software release notes documentation is always the best starting place.
  • Page 129 PFI pin, high to low, and clock source string set to 5. 3. Initiate analog input data acquisition, which will start only when the analog output waveform generation starts. 4. Initiate analog output waveform generation. © National Instruments Corporation PCI E Series User Manual...
  • Page 130 ICTR and CTR functions will not work with the DAQ-STC. The GPCTR functions have the same capabilities as the ICTR and CTR functions, plus more, but you must rewrite the application with the GPCTR function calls. PCI E Series User Manual © National Instruments Corporation...
  • Page 131 Table 4-1 shows that there is a 50 k pull-up resistor. This pull-up resistor will set the DIO(0) pin to a logic high when the output is in a high impedance state. © National Instruments Corporation PCI E Series User Manual...
  • Page 132 Electronic Services Bulletin Board Support National Instruments has BBS and FTP sites dedicated for 24-hour support with a collection of files and documents to answer most common customer questions. From these sites, you can also download the latest instrument drivers, updates, and example programs. For recorded instructions on how to use the bulletin board and FTP services and for BBS automated information, call (512) 795-6990.
  • Page 133 Telephone and Fax Support National Instruments has branch offices all over the world. Use the list below to find the technical support number for your country. If there is no National Instruments office in your country, contact the source from which you purchased your software to obtain support.

  • Page 134: Technical Support Form

    National Instruments for technical support helps our applications engineers answer your questions more efficiently. If you are using any National Instruments hardware or software products related to this problem, include the configuration forms from their user manuals. Include additional pages if necessary.
  • Page 135 Complete a new copy of this form each time you revise your software or hardware configuration, and use this form as a reference for your current configuration. Completing this form accurately before contacting National Instruments for technical support helps our applications engineers answer your questions more efficiently.
  • Page 136 Documentation Comment Form National Instruments encourages you to comment on the documentation supplied with our products. This information helps us provide quality products to meet your needs. Title: PCI E Series User Manual Edition Date: January 1999 Part Number: 320945D-01 Please comment on the completeness, clarity, and organization of the manual.
  • Page 137 Symbols/Numbers ° degrees > greater than greater than or equal to < less than less than or equal to percent ± plus or minus positive of, or plus © National Instruments Corporation PCI E Series User Manual...
  • Page 138 ANSI American National Standards Institute analog output AOGND analog output ground signal ASIC Application-Specific Integrated Circuit—a proprietary semiconductor component designed and manufactured to perform a set of specific functions. PCI E Series User Manual © National Instruments Corporation...
  • Page 139 (timing) counter digital-to-analog digital-to-analog converter—an electronic device, often an integrated circuit, that converts a digital number into a corresponding analog voltage or current © National Instruments Corporation PCI E Series User Manual...
  • Page 140 1 LSB digital output EEPROM electrically erasable programmable read-only memory—ROM that can be erased with an electrical signal and reprogrammed EXTREF external reference signal EXTSTROBE external strobe signal PCI E Series User Manual © National Instruments Corporation...
  • Page 141 0 up down GPCTR1_GATE general purpose counter 1 gate signal GPCTR1_OUT general purpose counter 1 output signal GPCTR1_SOURCE general purpose counter 1 clock source signal GPCTR1_UP_DOWN general purpose counter 1 up down © National Instruments Corporation PCI E Series User Manual...
  • Page 142 PCI E Series User Manual © National Instruments Corporation...
  • Page 143 PCs and work-stations; it offers a theoretical maximum transfer rate of 132 MB/s. Programmable Function Input PFI0/TRIG1 PFI0/trigger 1 PFI1/TRIG2 PFI1/trigger 2 PFI2/CONVERT* PFI2/convert PFI3/GPCTR1_SOURCE PFI3/general purpose counter 1 source PFI4/GPCTR1_GATE PFI4/general purpose counter 1 gate © National Instruments Corporation PCI E Series User Manual...
  • Page 144 RTSIbus real-time system integration bus—the National Instruments timing bus that connects DAQ boards directly, by means of connectors on top of the boards, for precise synchronization of functions...
  • Page 145 The junction produces a small voltage as a function of the temperature. TRIG trigger signal © National Instruments Corporation PCI E Series User Manual...
  • Page 146 (VI), which consists of a front panel user interface and a block diagram program volts, input high volts, input low volts in measured voltage volts, output high volts, output low reference voltage Vrms volts, root mean square PCI E Series User Manual G-10 © National Instruments Corporation...
  • Page 147 Glossary waveform multiple voltage readings taken at a specific sampling rate WFTRIG waveform generation trigger signal © National Instruments Corporation G-11 PCI E Series User Manual...
  • Page 148 PCI-MIO-16XE-10, PCI-6031E, questions about, C-2 to C-3 PCI-6032E, and PCI-6033E (table), 4-9 selection considerations, 3-8 PCI-MIO-16XE-50 (table), 4-10 signal connections, 4-12 to 4-13 AISENSE signal analog input specifications analog input connections, 4-12 © National Instruments Corporation PCI E Series User Manual...
  • Page 149 PCI-MIO-16E-1, PCI-MIO-16E-4, and PCI-6071E (table), 4-7 analog output specifications PCI-MIO-16XE-10, PCI-6031E, PCI-MIO-16E-1, PCI-MIO-16E-4, and PCI-6032E, and PCI-6033E (table), 4-9 PCI-6071E, A-6 to A-8 PCI-MIO-16XE-50 (table), 4-10 dynamic characteristics, A-8 output characteristics, A-6 PCI E Series User Manual © National Instruments Corporation...
  • Page 150 ComponentWorks software, 1-3 TRIG1 signal, 4-30 to 4-31 configuration. See also input configurations. TRIG2 signal, 4-31 to 4-32 board configuration, 2-2 typical posttriggered acquisition (figure), questions about, C-2 4-28 connectors. See I/O connectors. © National Instruments Corporation PCI E Series User Manual...
  • Page 151 PCI-6032E, and PCI-6033E, A-18 EEPROM storage of calibration constants, 5-1 PCI-MIO-16XE-50, A-26 to A-27 electronic support services, D-1 to D-2 digital trigger specifications e-mail support, D-2 PCI-MIO-16E-1, PCI-MIO-16E-4, and environment specifications PCI-6071E, A-11 PCI E Series User Manual © National Instruments Corporation...
  • Page 152 4-46 PCI-MIO-16E-1, PCI-MIO-16E-4, and PCI-MIO-16E-1, PCI-MIO-16E-4, and PCI-6071E (table), 4-8 PCI-6071E (table), 4-8 PCI-MIO-16XE-10, PCI-6031E, PCI-MIO-16XE-10, PCI-6031E, and PCI-6032E, and PCI-6033E (table), 4-9 PCI-6033E (table), 4-10 PCI-MIO-16XE-50 (table), 4-11 © National Instruments Corporation PCI E Series User Manual...
  • Page 153 PCI-6071E, 3-1 PCI-6071E PCI-MIO-16XE-10 and PCI-6031E, actual range and measurement precision (table), 3-6 PCI-MIO-16XE-50, 3-4 unipolar and bipolar, 3-5 to 3-6 digital I/O, 3-17 timing signal routing, 3-17 to 3-20 PCI E Series User Manual © National Instruments Corporation...
  • Page 154 C-1 to C-2 installation and configuration, C-2 timing and digital I/O, C-4 to C-5 LabVIEW and LabWindows/CVI application requirements for getting started, 1-2 software, 1-3 software programming choices, 1-2 to 1-5 ComponentWorks, 1-3 © National Instruments Corporation PCI E Series User Manual...
  • Page 155 4-28 PCI-MIO-16E-1, PCI-MIO-16E-4, and connecting to external signal source PCI-6071E (table), 4-8 (warning), C-5 PCI-MIO-16XE-10, PCI-6031E, overview, 4-27 to 4-28 PCI-6032E, and PCI-6033E (table), 4-9 questions about, C-5 PCI-MIO-16XE-50 (table), 4-11 PCI E Series User Manual © National Instruments Corporation...
  • Page 156 (RSE). See RSE mixing bipolar and unipolar channels (referenced single-ended input). (note), 3-7 register-level programming, 1-5 PCI-MIO-16E-1, PCI-MIO-16E-4, reglitching and PCI-6071E, 3-5 to 3-6 questions about, C-3 reglitch selection, analog output, 3-13 © National Instruments Corporation PCI E Series User Manual...
  • Page 157 4-14 to 4-22 PCI-6032E (figure), 4-2 common-mode signal rejection, 4-22 signal descriptions (table), 4-4 to 4-6 differential connections power connections, 4-26 DIFF input configuration, 4-16 timing connections, 4-27 to 4-46 PCI E Series User Manual I-10 © National Instruments Corporation...
  • Page 158 UISOURCE signal, 4-39 to 4-40 digital trigger, A-11 UPDATE* signal, 4-38 to 4-39 environment, A-12 WFTRIG signal, 4-37 to 4-38 physical, A-11 to A-12 types of signal sources, 4-14 power requirements, A-11 floating, 4-14 © National Instruments Corporation I-11 PCI E Series User Manual...
  • Page 159 A-23 DAQ timing connections, 4-28 to 4-37 analog output AIGATE signal, 4-36 dynamic characteristics, A-26 CONVERT* signal, 4-34 to 4-36 output characteristics, A-24 to A-25 EXTSTROBE* signal, 4-29 to 4-30 PCI E Series User Manual I-12 © National Instruments Corporation...
  • Page 160 PCI-6071E, A-10 PCI-MIO-16XE-50, A-27 PCI-MIO-16XE-10, PCI-6031E, timing signal routing, 3-17 to 3-20 PCI-6032E, and PCI-6033E, A-19 to A-20 CONVERT* signal routing (figure), 3-18 digital trigger specifications programmable function inputs, 3-19 © National Instruments Corporation I-13 PCI E Series User Manual...
  • Page 161 PCI-6071E (table), 4-7 PCI-MIO-16XE-10, PCI-6031E, PCI-6032E, and PCI-6033E (table), 4-9 PCI-MIO-16XE-50 (table), 4-10 VirtualBench software, 1-3 voltage output specifications PCI-MIO-16E-1, PCI-MIO-16E-4, and PCI-6071E, A-7 to A-8 PCI-MIO-16XE-10 and PCI-6031E, A-17 PCI-MIO-16XE-50, A-25 PCI E Series User Manual I-14 © National Instruments Corporation...

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