The Link Chaining Mode For Dma Transfer - National Instruments PCI E Series Programmer's Manual

Chapter 4 Programming

The Link Chaining Mode for DMA Transfer

PCI E Series RLPM
Make sure that the same logical channel is not assigned to more than
one resource.
DMA requests are generated when all of the above mentioned
initializations are done and when the source is programmed appropriately.
For analog input, the AIFREQ signal from the DAQ-STC is used as the
DMA source. For more information, see Chapter 2 of the DAQ-STC
Technical Reference Manual. By using the
function, you can generate DMA requests based on any of the
following conditions:
• FIFO not empty
• FIFO half-full
• FIFO full
• FIFO half-full until FIFO is empty
For analog output, the AOFREQ signal from the DAQ-STC is used as the
DMA source. By using the
requests based on any of the following conditions:
• FIFO empty
• FIFO less than half-full
• FIFO not full
• Assert on FIFO half-full and deassert on FIFO full
For general-purpose counter/timers, an interrupt is produced in buffered
modes, such as the buffered event counting, the buffered period
measurement, and so on. The secondary bank of interrupts in the DAQ-STC
is used for generating DMA requests for the general-purpose
counter/timers.
The MITE contains DMA channels that may be used to transfer data to the
I/O and CPU port. Each channel supports several modes of operation. One
of the modes of operation is the Link Chaining Mode. It enables the user to
do DMA transfers, limited only by the size of the memory space. This mode
of operation is used in analog input Example 4. The Link Chaining Mode
requires a linked list structure to store the information for each buffer. The
linked list structure enables DMA transfers on different memory segments
and makes seamless data transfer possible.
Inside the linked list structure, each node contains values for TCR, MAR,
DAR, and LKAR. TCR (Transfer Count Register) stores the total number
function you can generate DMA
AO_FIFO
4-58
FIFO_Request_Selection
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