Adc Fifo Data Register - National Instruments PCI E Series Programmer's Manual

Chapter 3 Register Map and Descriptions

ADC FIFO Data Register

The ADC FIFO Data Register returns the oldest ADC conversion value stored in the ADC
FIFO. Reading the ADC FIFO removes that value and leaves space for another ADC
conversion value to be stored. Values are shifted into the ADC FIFO whenever an ADC
conversion is complete unless the GHOST bit is set in that entry of the Configuration
Memory.
The ADC FIFO is emptied when all values it contains are read. The empty, half-full, and full
flags from the ADC data FIFO are available in a status register in the DAQ-STC. These flags
indicate when the FIFO is empty, half-full, or full, respectively. Whenever the FIFO is not
empty, the stored data can be read from the ADC FIFO Data register.
The values returned by reading the ADC Data Register are available in two different binary
formats: straight binary, which generates only positive numbers, or two's complement binary,
which generates both positive and negative numbers. The binary format used is determined
by the mode in which the ADC is configured. Following is the bit pattern returned for
either format:
Address:
Type:
Word Size:
Bit Map:
15 14
D15 D14
7 6
D7 D6
Bit
15–0
PCI E Series RLPM
Base address + 1C (hex)
Read-only
16-bit
13 12
D13 D12
5 4
D5 D4
Name Description
D<15..0> Data bits 15 through 0—These bits are the result of the
ADC conversion. The boards with a 12-bit ADC return
values ranging from 0 to 4,095 decimal (0x0000 to
0x0FFF) when the ADC is in unipolar mode, and –2,048 to
2,047 decimal (0xF800 to 0x07FF) when the ADC is in
bipolar mode. The boards with a 16-bit ADC return values
ranging from 0 to 65,535 decimal (0x0000 to 0xFFFF)
when the ADC is in unipolar mode and 32,768 to 32,767
decimal (0x8000 to 0x7FFF) when the ADC is in bipolar
mode. The mode is controlled by the Unip/Bip bit in the
Configuration Memory Low Register.
11 10
D11 D10
3 2
D3 D2
3-8
9
D9 D8
1
D1 D0
© National Instruments Corporation
8
0