Table 3-3. Pgia Gain Selection - National Instruments PCI E Series Programmer's Manual

Register-level programmer manual, multifunction i/o boards for pci bus computers, register-level
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Chapter 3
Register Map and Descriptions
8
2–0
PCI E Series RLPM
PCI-MIO-16XE-10, PCI-6031E, PCI-6032E, and
PCI-6033E and should be set to 1. Dither cannot be
disabled on the PCI-MIO-16XE-50, PCI-MIO-16XE-10,
PCI-6031E, PCI-6032E, and PCI-6033E.
Unip/Bip
Channel Unipolar/Bipolar—This bit configures the ADC
for unipolar or bipolar mode. When Unip/Bip is set, the
ADC is configured for unipolar operation and values read
from the ADC Data Register are in straight binary format.
When Unip/Bip is clear, the ADC is configured for bipolar
operation and values. The data values are two's
complement and automatically sign extended.
Gain<2..0>
Channel Gain Select 2 through 0—These three bits control
the gain settings of the input PGIA for the selected analog
channel. The gains shown in Table 3-3 can be selected on
the PCI E Series boards.
1
Not supported on the PCI-MIO-16XE-50
2
Not supported on the PCI-MIO-16XE-10, PCI-6031E, PCI-6032E,
and PCI-6033E
3
Not supported on the PCI-6023E, PCI-6024E, and PCI-6025E.

Table 3-3. PGIA Gain Selection

Gain<2..0>
000
001
010
011
100
101
110
111
3-10
Actual Gain
1,2
0.5
1
3
2
1, 3
5
10
1, 3
20
1, 3
50
100
© National Instruments Corporation

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