Configuration Memory High Register - National Instruments PCI E Series Programmer's Manual

Configuration Memory High Register

The Configuration Memory High Register works with the Configuration Memory Low
Register to control the input channel selection multiplexers, gain, range, and mode settings.
This register contains nine of these bits. The contents of this register are cleared by a control
register in the DAQ-STC.
Address:
Type:
Word Size:
Bit Map:
15 14
Reserved ChanType2
7 6
Reserved Reserved
Bit
15,
11–6
14–12
© National Instruments Corporation
Base address + 12 (hex)
Write-only
16-bit
13 12
ChanType1 ChanType0
5 4
Reserved/ Reserved/
Bank 1 Bank 0
Name Description
Reserved Reserved—Always write 0 to these bits.
ChanType<2..0> Channel Type 2 through 0—These bits indicate which type
of resource is active for the current entry in the scan list.
The following table lists the valid channel types.
Chapter 3
11
Reserved Reserved
3
Chan3 Chan2
Chan Type<2..0>
000
001
010
011
100
101
110
111
3-11
Register Map and Descriptions
10 9
Reserved
2 1
Chan1
Resource
Calibration
Differential
NRSE
RSE
X
Aux
X
Ghost
PCI E Series RLPM
8
Reserved
0
Chan0