Ao Configuration Register - National Instruments PCI E Series Programmer's Manual

Register-level programmer manual, multifunction i/o boards for pci bus computers, register-level
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Chapter 3
Register Map and Descriptions

AO Configuration Register

The AO Configuration Register contains five bits that control the PCI E Series analog output
configuration. The contents of this register are cleared upon power up and after a reset
condition.
Address:
Type:
Word Size:
Bit Map:
15
14
Reserved
Reserved
7
6
Reserved
Reserved
Bit
15–9,
7–4
8
3
2
PCI E Series RLPM
Base address + 16 (hex)
Write-only
16-bit
13
12
Reserved
Reserved
5
4
Reserved
Reserved
Name
Description
Reserved
Reserved—Always write 0 to these bits.
DACSel
DAC Select—This bit indicates which DAC is the
destination for the configuration bits in this register.
DAC0 will be selected when this bit is cleared, and DAC1
will be selected when set.
GroundRef
Ground Reference—This bit connects the reference for
both DACs to ground when this bit is set. This is useful for
calibration of the DAC linearity. This bit is not currently
implemented as a separate selection for the two DACs.
Therefore, its state is determined by the last value
written to this bit field. This bit is reserved on the
PCI-MIO-16XE-50, PCI-MIO-16XE-10, and PCI-6031E.
It should be set to 0.
ExtRef
External Reference for DAC—This bit controls the
reference selection for the selected DAC. If this bit is set,
the reference used for the DAC is the external reference
voltage from the I/O connector. If this bit is cleared, the
internal +10 V
reserved on the PCI-MIO-16XE-50, PCI-MIO-16XE-10,
11
10
Reserved
Reserved
3
2
GroundRef
ExtRef
is used for the DAC reference. This bit is
ref
3-16
9
Reserved
DACSel
1
ReGlitch
BipDac
© National Instruments Corporation
8
0

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