Posttrigger And Pretrigger Acquisition; Table 2-2. Analog Input Configuration Memory - National Instruments PCI E Series Programmer's Manual

Register-level programmer manual, multifunction i/o boards for pci bus computers, register-level
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Chapter 2
Theory of Operation
PCI E Series RLPM
Table 2-2 shows what the configuration memory should look like.

Table 2-2. Analog Input Configuration Memory

Channel
0
1
0
1
0
1
0
1
0
1
0
1
Now both channel 0 and channel 1 are sampled with 50% duty cycle.

Posttrigger and Pretrigger Acquisition

Whereas a data acquisition operation normally ends when the SC counts
down to zero, it can be initiated either through software, by strobing a bit
in a control register in the DAQ-STC, or by suitable external triggers.
There are two internal trigger lines—START1 and START2. These appear
at the connector on pins called PFI0/Trig1 and PFI1/Trig2, respectively.
START1 is used as a trigger line in the posttrigger mode. Since the START1
pulse can be generated through software by strobing a bit, all of the
examples discussed so far can be generally categorized as posttrigger
acquisition. In the classic posttrigger mode case, the data acquisition
circuitry is armed by software but does not start acquiring data until a pulse
is given on the START1 line. Then the acquisition starts and ends when the
SCAN counter counts down to zero.
In the pretrigger mode, data is acquired before and after the trigger. In this
mode, both START1 and START2 lines are used. There are two counts for
Ghost
ghost
ghost
ghost
ghost
ghost
ghost
ghost
2-18
Last Channel
last channel
last channel
last channel
last channel
last channel
last channel
© National Instruments Corporation

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