Command/Status Register (Cstat) - Motorola DigitalDNA MPC180E User Manual

External Bus Interface
0
Field
Reset
R/W
16 17 18 19
Field — DEU AFEU MDEU RNG PKEU
Reset
R/W
Addr
Figure 3-2. Command/Status Register (CSTAT)
Table 3-3 describes CSTAT fields.
Bits Name
0–10 — Reserved, should be cleared.
11–15 Source interrupt indicators for the individual execution units. These are the masked interrupts from the
execution units.
For bits 11–15:
0 interrupt not pending
1 interrupt pending
11 DEU Data Encryption Standard Execution Unit External Bus Interface interrupts
12 AFEU Arc Four Execution Unit External Bus Interface interrupts
13 MDEU Message Digest Execution Unit External Bus Interface interrupts
14 RNG Random Number Generator External Bus Interface interrupts
15 PKEU Public key Execution Unit External Bus Interface interrupts
16–17 — Reserved, should be cleared.
18–22 Raw interrupt indicators for individual execution units. These are the unmasked interrupts from the
execution units.
For bits18–22:
0 interrupt not pending
1 interrupt pending
18 DEU Data Encryption Standard Execution Unit interrupts
19 AFEU Arc Four Execution Unit interrupts
20 MDEU Message Digest Execution Unit interrupts
21 RNG Random Number Generator interrupts
22 PKEU Public key Execution Unit interrupts
23 MPC180E MPC180E IRQ. This bit, when set, indicates an interrupt is pending in the MPC180E.
0 interrupt not pending
1 interrupt pending
3-6
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
—
0000_0000_0000_0000
R/W
20 21 22 23
MPC180E
0000_0000_0000_0000
R/W
0x900
Table 3-3. CSTAT Field Descriptions
MPC180E Security Processor User's Manual
10 11 12
DEU AFEU
24 27 28
Destination AUTO-UNMASK
Description
13 14 15
MDEU RNG PKEU
30 31
RST