Random Number Generator Registers; Status Register - Motorola DigitalDNA MPC180E User Manual

Security processor
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Random Number Generator Registers

repeating this process until the required number of 32-bit random words have been
generated. Reads by the EBI can be repeated as soon as the ORDY bit is driven high again.
The process is outlined as follows:
• CPU sets up MPC180E EBI to generate required number of random words.
• EBI waits for ORDY signal to be driven low.
• EBI reads autorand (Automatic Random Output Register), writes to Output FIFO.
• Repeat previous steps until Output Buffer Count Register reaches zero.
At this point, the EBI can generate an interrupt to inform the CPU that the required number
of random words is waiting in the Output FIFO. These random words can be read by the
CPU for immediate write back to the MPC180E, or written into memory for later use.
8.4 Random Number Generator Registers
Table 8-1 shows RNG registers.
Table 8-1. Random Number Generator Registers
MPC180E 12-Bit Address
0x600
0x602

8.4.1 Status Register

Figure 8-1 shows the RNG status register.
0
Field
Reset
R/W
Addr
Table 8-2 describes the RNG status register fields.
Table 8-2. RNG Status Register Field Descriptions
Bits
Name
0–17
Reserved.
18
ORDY
The ORDY bit will be driven high when random data is ready. If the user performs a read
of the Random Output Register while the ORDY bit is low, the RNG will assert wait states
until the ORDY bit goes high.
19–30 –
Reserved.
31
ON/OFF A value of 1 indicates that the RNG is on and the shift registers are randomizing.
8-2
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
Processor 32-Bit Address
0x0000_1800
0x0000_1808
17
18
19
ORDY
0000_0000_0000_0001
R
0X600
Figure 8-1. RNG Status Register
Description
MPC180E Security Processor User's Manual
Register
Status
Autorand output
Type
R
R
30
31
ON/OFF

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