Ibctl Field Descriptions - Motorola DigitalDNA MPC180E User Manual

External Bus Interface
0
Field
Reset
R/W
16
Field —
Reset
R/W
Addr
Figure 3-5. Input Buffer Control (IBCTL) and Output Buffer Control (OBCTL)
Table 3-6 describes IBCTL fields.
Bits Name
0–7 — Reserved, should be cleared.
8–15 Count mask Defines how the buffer controller presents addresses to execution units when data is
taken from the input buffer. The count mask bits define the number of 32-bit words to be
transferred into each execution unit as defined by the input block size upon which the
specific algorithms operate.
16–21 — Reserved, should be cleared.
22–31 Starting address Starting address of the input buffer data destination. The starting address is the address
to which the first word of data from the input buffer is written for a given operation. All
subsequent addresses are derived from this address.
Table 3-7 describes OBCTL fields.
Table 3-7. OBCTL Register Field Descriptions
Bits Name
0–7 — Reserved, should be cleared.
8–15 Count mask Defines how the buffer controller presents addresses to execution units when data is
read from the active execution unit and written to the output buffer. The count mask bits
define the number of 32-bit words to be transferred from each execution unit as defined
by the output block size produced by the specific algorithms.
16–21 — Reserved, should be cleared.
22–31 Starting address Starting address of the output buffer data source. The starting address is the address
from which the first word of data to the output buffer is read for a given operation. All
subsequent addresses are derived from this address.
3-10
PRELIMINARY—SUBJECT TO CHANGE WITHOUT NOTICE
7
—
0000_0000_0000_0000
R/W
21 22
0000_0000_0000_0000
R/W
IBCTL: 0x903; OBCTL: 0x905
Registers
Table 3-6. IBCTL Field Descriptions
MPC180E Security Processor User's Manual
8
Count Mask
Starting Address
Description
Description
15
31