Crystal Support; Oscillator Support; Cpu/Bus Interface Header Strips; Schematic Notes - Epson S1D13503 Series Technical Manual

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3.9 Crystal Support

The input crystal frequency may be up to 25.0 MHz depending on the specific panel size and frame
rate desired.
Refer to Section 9.3 of the Hardware Functional Specification for further details.

3.10 Oscillator Support

The input oscillator frequency used may be up to 25.0 MHz, depending on the specific panel size
and frame rate desired.
Refer to Section 9.3 of the Hardware Functional Specification for further details.
Note: When the oscillator package is used capacitors C7, C8 and resistor R16 must be removed.

3.11 CPU/Bus Interface Header Strips

All of the CPU/Bus interface pins of S1D13503F00A, with the exception of SA16, are connected to
the header strips H1 and H2 for easy interface to a CPU/Bus other than the ISA bus.
Refer to Table 2-5, "CPU/BUS Connector H1 Pinout," on page 4 and Table 2-6, "CPU/BUS Con-
nector H2 Pinout," on page 5 for specific settings.
Note: These headers only provide the CPU/Bus interface signals from S1D13503F00A, when MC68000 in-
terface is selected (SW1-3 closed), external decoding logic MUST be used to access the
S1D13503F00A.

3.12 Schematic Notes

This evaluation board may have been modified and therefore the following schematics may not
reflect the actual implementation. Please request updated information before starting any hardware
design.
S18A-G-007-01
S5U13503P00C Rev. 1.0 Evaluation Board User's Manual
4-9

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