Beechcraft C-12C Operator And Technical Reference Manual page 67

Army c-12c aircraft nsn 1510-01-070-3661, army c-12d aircraft nsn 1510-01-087-9129, army c-12t aircraft nsn 1510-01-470-0220
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When displaying exceedence N
measured value, not "----", shall be displayed, up to
199.0% RPM.
The indicator shall perform BIT on the LCD
display, ROM (program memory), RAM (volatile
memory), display BIT will consist of displaying all
active LCD segments for three seconds on power up.
If the ROM or RAM fails BIT the indicator will display
"0" on both the digital and bar graph displays. If the
EEPROM BIT fails the indicator will prefix the digital
display with "F". BIT failures shall not be stored in
EEPROM. Failures detected will not affect the display
after power is cycled unless the failure is again
encountered.
The indicator shall prefix the digital display with
an "E" when an event is being or has been recorded
and not played back.
The indicator will start recording an event
immediately when the indicator has measured percent
RPM greater than 102.6 or when the indicator has
measured percent RPM above 101.5 continuously for
ten seconds.
The indicator will end recording and
store the event when the measured percent RPM
drops to 101.5 or lower.
Event display will be initiated by pressing the
EXCEEDENCE DISPLAY switch for 0.2 seconds or
longer. Each event display will consist of the following
cycle:
(1) The event number will be displayed for
2 seconds.
(2) The event peak percent RPM will
displayed for 2 seconds.
(3) The event duration, in seconds, will be
displayed for 2 seconds.
All three data items displayed during playback
shall be prefixed with a "P" unless an EEPROM BIT
failure has been detected in which case the display will
be prefixed with an "F."
Once an event playback sequence has been
performed, the E prefixed to the digital display will be
removed. All event data is still available for playback
until the data is erased. The display will be prefixed
with an "E" again on the next power up cycle if the old
data has not been erased or if another event is
recorded.
values the actual
1
Pressing the EXCEEDENCE ERASE switch
for 0.2 seconds or longer will cause all
events to be erased from non-volatile
memory. There is no provision for erasing
individual events.
The Turbine Tachometers are protected by
1.0-ampere circuit breakers, placarded TACH N
and #2, located on the pilot's left sub-panel.
d. Engine Oil Pressure and Temperature
Indicator.
The indicator displays the measured
engine oil pressure and engine oil temperature on two
separate 23-segment nonlinear bar graph displays.
The oil pressure indicator has a bar graph range of 0
to 200 psi. The engine oil temperature portion of the
gauge has a range of 0 to 120 °C.
The segment display resolution for the oil
pressure is 20 psi in the 0 to 60 psi range, 5 psi in the
60 to 140 psi range, and 20 psi in the 140 to 200 psi
range.
The indicator has a BIT on the LCD display,
ROM (program memory) RAM (volatile memory), and
the signal input path.
displaying all active LCD segments for three seconds
on power up.
If the ROM or RAM BIT fails the
indicator display will be blank. If the input signal fails
BIT, the indicator shall display 0 psi.
The Engine Oil pressure and Temperature
Indicators are protected by 5-ampere circuit breakers,
placarded OIL PRESS and OIL TEMP #1 and #2,
located on the overhead circuit breaker panel.
e. Fuel Flow Indicator.
display the measured fuel flow concurrently in a 1
alphabetic, 3½ numeric character display and a 41-
segment bar graph display.
The indicator has a digital display range of 0 to
600 pounds per hour. The bar graph displays a range
of 0 to 600 pounds per hour. The digital display will
contain dashes (----) when the measured fuel flow is
greater than 600 pounds per hour.
The indicator shall perform BIT testing on the
LCD display, ROM (program memory), RAM (volatile
data memory), and the signal input path. The display
BIT consists of displaying all active LCD segments for
three seconds on power up.
verifies the range of the incoming signal.
If the ROM or RAM fails BIT the indicator display
will be blanked.
If the input signal fails BIT the
TM 1-1510-218-10
NOTE
The display BIT consists of
The indicator shall
The signal input BIT
#1
1
2-51

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