Citizen CL-S400DT Technical Manual page 31

Chapter 2 Operating Principles
2-2. Operation of Control Parts
The voltage input at 6 (REFMON1) during photodetector conduction can vary with the
characteristics of a phototransistor to be used and with other factors. To solve this problem,
FPGA (U11) outputs RSNSCTL0 (pin N13) and RSENSCTL1 (pin N14) signals to turn ON/OFF
(connect/disconnect) R83 and R82 (voltage dividing resistors) to minimize the difference in
level at pin 6 (REFMON1).
The current control for the light emitter is done in the same way as for the transparent sensor
mentioned above. The CPU changes data (current flowing into the light emitter) to keep the
level at pin 6 (REFMON1) of the CPU constant.
U1A
CPU
Transparent sensor
output sensing terminal
TRAMON
5
ANI0
U11
FPGA
R14
TSNSCTL1
B4-34
TSNSCTL0
R13
B4-33
U1A
CPU Reflective sensor
output sensing terminal
REFMON1
6
ANI1
U11
FPGA
N14 RSNSCTL1
B3-38
RSNSCTL0
N13
B3-37
From
U1A CPU
CL-S400DT
U16B
5
+
7
6
-
C101
BA2904
Q4
DTC114EM
U16A
3
+
1
2
-
C100
BA2904
Q3
DTC114EM
U4
D/A Converter
7
AO1
CK
2 BSNSLED0
6
AO2
DI
8
AO3
LD
BH2220
[SA Main PCB]
R81
R87
R85
R86
Q6
DTC114EM
R80
R84
R82
R83
Q5
DTC114EM
R88
Q7
2SC5658
R89
2-18
Transparent Sensor
J8
+3.3V
[SA Adjust Sensor U]
1
2
+3.3V
J7
1
2
3
[SA Adjust Sensor L]
Reflective Sensor
Media