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APOLLO user manual
ICH4 (IO controller hub)
The IO controller hub contains the primary PCI interface, LPC interface, USB 2.0,
ATA-100, AC'97, Ethernet controller and other I/O functions. It communicates with the
GMCH over an interconnect bus known as the hub interface. The ICH4 supports the
following functions:
•
ACPI Power Management Logic Support.
•
Enhanced DMA controller, Interrupt controller and timer functions.
•
Integrated IDE controller supports Ultra ATA100/66/33 and PIO.
•
USB host interface with support for six USB ports, one UHCI host controllers and
one EHCI high-speed host controller.
•
Integrated 10/100 Ethernet controller.
•
System Management Bus (SMBus) Specification, version 2.0 with additional support
for I2C devices.
•
AC '97 codec interface.
•
Low Pin Count (LPC) and firmware hub (FWH) interface support.
•
Tamper detection input.
Interrupt controller
The ICH4 incorporates the functionality of two 8259-interrupt controllers that provide
system interrupts for the ISA compatible interrupts. These interrupts are: system timer,
keyboard controller, serial ports, parallel ports, floppy disk, IDE, mouse and DMA
channels. In addition, this interrupt controller can support the PCI based interrupts, by
mapping the PCI interrupt onto the compatible ISA interrupt line. Each 8259 core
supports eight interrupts, numbered 0–7.
The ICH4 also supports the advanced programmable interrupt controller (APIC) that
provides for up to 24 interrupts. This interrupt scheme can be enabled in the BIOS ACPI
setup screen; see
information about APIC.
The BIOS configures the interrupt routing at boot time. ISA interrupts can be reserved in
the BIOS for legacy ISA devices that require this. See
exclusion
settings, page 72, for further details.
If you install an operating system using non IO APIC mode of operation, and then
subsequently change to APIC mode, the operating system may not boot correctly.
98
ACPI control
settings, page 78, for details. See page
125
for further
PCI/PNP ISA IRQ resource
Issue G
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