System Memory Map; Interrupts - Eurotech Apollo User Manual

System memory map

System memory segment
000000H – 09FFFFH
0A0000H – 0BFFFFH
0C0000H – 0CFFFFH
0D0000H – 0DAFFFH
0DB000H – 0DBFFFH
0DC000H – 0DFFFFH
0E0000H – 0EFFFFH
0F0000H – 0FFFFFH
These locations are based on the BIOS default setups; the memory location of
these devices will change if the default BIOS options for the IO ports are
modified.

Interrupts

The APOLLO supports two different interrupt modes:
•
The standard dual 8259 programmable interrupt controller providing 15 interrupt
connections.
•
The advanced programmable interrupt controller (APIC) which supports up to 24
interrupt connections.
Most operating systems only provide support for the standard 8259 interrupt controller.
However operating systems such as Windows XP
APIC interrupt mode. The APIC provides a superior interrupt architecture that allows for
lower interrupt latency and reduces the number of shared interrupts in a system.
Standard 8259 interrupt connections
The internal connections are routed internally to the 8259 controller. The external
interrupts are routed using a serialized interrupt (SERIRQ) mechanism. This is interfaced
to the SuperIO for legacy IO, and to the CompactFlash
and a TPM when fitted. PCI interrupt mappings are configured by the BIOS during boot.
Issue G
Detailed hardware description
Description
0 – 640KB DOS region
Graphics controller memory region
Video BIOS
Expansion area
PCI 4510A Cardbus controller
Expansion area
Expansion BIOS area
System BIOS area
®
and Windows 2000
®
controller to provide boot support
®
support the
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