Eurotech Apollo User Manual page 44

Intel celeron m/pentium m based ebx
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APOLLO user manual
J17 – LVDS display interface (Dual channel)
40-way 2mm Hirose DF13-40DP-1.25V.
Mating connector: Hirose DF13-40DS-1.25C
Crimps: Hirose: DF13-2630SCFA
For optimum performance of the LVDS interface a shielded twisted pair cable should be
used.
Pin
Signal name
1
+3.3V
3
+3.3V
5
Ground
7
IYA0-
9
IYA0+
11
Ground
13
IYA2-
15
IYA2+
17
Ground
19
ICLKA-
21
ICLKA+
23
Ground
25
IYB1-
27
IYB1+
29
Ground
31
IYB3-
33
IYB3+
35
Ground
37
Ground
39
DDC CLK
44
Pin
Signal name
2
+3.3V
4
+3.3V
6
Ground
8
IYA1-
10
IYA1+
12
Ground
14
IYA3-
16
IYA3+
18
Ground
20
IYB0-
22
IYB0+
24
Ground
26
IYB2-
28
IYB2+
30
Ground
32
ICLKB-
34
ICLKB+
36
Ground
38
Ground
40
DDC DATA
2
1
40
39
Issue G

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