Eurotech VIPER Technical Manual

Pxa255 risc based pc/104 single board computer
Hide thumbs Also See for VIPER:

Advertisement

Quick Links

31
VIPER / VIPER-Lite
PXA255 RISC based PC/104
Single Board Computer
Technical Manual

Advertisement

Table of Contents
loading
Need help?

Need help?

Do you have a question about the VIPER and is the answer not in the manual?

Questions and answers

Subscribe to Our Youtube Channel

Summary of Contents for Eurotech VIPER

  • Page 1 VIPER / VIPER-Lite PXA255 RISC based PC/104 Single Board Computer Technical Manual...
  • Page 2 VIPER Technical Manual Definitions Eurotech is the trading name for Eurotech Ltd. Disclaimer The information in this manual has been carefully checked and is believed to be accurate. Eurotech assumes no responsibility for any infringements of patents or other rights of third parties, which may result from its use.
  • Page 3: Table Of Contents

    VIPER Technical Manual Contents Contents Introduction ............................4 VIPER ‘at a glance’........................5 VIPER-Lite ‘at a glance’ ......................6 VIPER features ........................7 VIPER support products ......................9 Product handling and environmental compliance ..............12 Conventions .........................13 Getting started ..........................15 Using the VIPER ........................15 Detailed hardware description ......................18 VIPER block diagram......................18...
  • Page 4: Introduction

    VIPER Technical Manual Introduction Introduction The VIPER is an ultra low power, PC/104 compatible, single board computer available in two standard variants: • VIPER, based on the 400MHz PXA255 XScale processor. • VIPER-Lite, based on the 200MHz PXA255 XScale processor.
  • Page 5: Viper 'At A Glance

    VIPER Technical Manual Introduction VIPER ‘at a glance’ Five Serial Ports Jumpers 10/100BaseTX Ethernet Audio – In/Out/MIC/AMP Ethernet LEDs Power (inc reset input) Battery TPM Tamper 400MHz PXA255 (optional) processor 8/16-bit PC/104 interface JTAG Intel StrataFLASH Jumpers USB Client Digital I/O...
  • Page 6: Viper-Lite 'At A Glance

    VIPER Technical Manual Introduction VIPER-Lite ‘at a glance’ Three Serial Ports 10/100BaseTX Ethernet Ethernet LEDs Power (inc reset input) Battery 200MHz PXA255 processor JTAG Intel StrataFLASH Jumpers USB Client Digital I/O TFT/STN panel CompactFLASH (CF+) © 2007 Eurotech Ltd Issue E...
  • Page 7: Viper Features

    VIPER Technical Manual Introduction VIPER features Microprocessor • PXA255 400MHz (VIPER) or 200MHz (VIPER-Lite) RISC processor. Cache • 32K data cache, 32K instruction cache, 2K mini data cache. System memory • 64MB un-buffered 3.3V SDRAM. Silicon disk • Up to 16/32MB Intel StrataFLASH (with FLASH access LED).
  • Page 8 VIPER Technical Manual Introduction Network support • SMSC LAN91C111 10/100BaseTX Ethernet controller. • One 10/100BaseTX NIC port. Trusted Platform Module (TPM) [optional] • Atmel AT97SC3201 TPM security, with full TCG/TCPA V1.1b compatibility. • Includes crypto accelerator capable of computing a 1024-bit RSA signature in 100ms.
  • Page 9: Viper Support Products

    VIPER Technical Manual Introduction VIPER support products The VIPER supports the following products: • VIPER-UPS (Uninterruptible Power Supply) The VIPER-UPS serves as a 5V DC power supply and battery back up system for the VIPER. The UPS accepts between 10 – 36 VDC (10-25VAC) input and generates the +5V supply for the VIPER.
  • Page 10 VIPER Technical Manual Introduction • CYCLOPS The CYCLOPS is a rugged VIPER display terminal. The enclosure can be configured to suit a complete range of embedded applications with LCD display and touchscreen. • VIPER-ICE (Industrial Compact Enclosure) development kits The VIPER-ICE is a simple low cost aluminium enclosure, which provides easy connection to all on board features.
  • Page 11 VIPER Technical Manual Introduction • Wind River VxWorks 5.5 development kit Features of this kit are: - 400MHz PXA255 processor with 64MB DRAM & 32MB Flash memory. - VxWorks BSP for Tornado 2.2.1/VxWorks 5.5.1/Wind ML 3.0.2. - Pre-configured build of VxWorks, tailored specifically for the VIPER, pre-loaded into the 32MB Flash.
  • Page 12: Product Handling And Environmental Compliance

    VIPER Technical Manual Introduction Product handling and environmental compliance Anti-static handling This board contains CMOS devices that could be damaged in the event of static electricity discharged through them. At all times, please observe anti-static precautions when handling the board. This includes storing the board in appropriate anti-static packaging and wearing a wrist strap when handling the board.
  • Page 13: Conventions

    VIPER Technical Manual Introduction Conventions Symbols The following symbols are used in this guide: Symbol Explanation Note - information that requires your attention. Tip - a handy hint that may provide a useful alternative or save time. Caution - proceeding with a course of action may damage your equipment or result in loss of data.
  • Page 14 VIPER Technical Manual Introduction Tables With tables such as that shown below, the white cells show information relevant to the subject being discussed. Grey cells are not relevant in the current context. Byte lane Most Significant Byte Least Significant Byte...
  • Page 15: Getting Started

    VIPER Technical Manual Getting started Getting started Depending on the development kit purchased, a Quickstart Manual is provided for Windows CE, embedded Linux or VxWorks to enable users to set-up and start using the board. Please read the relevant manual and follow the steps defining the set-up of the board.
  • Page 16 VIPER Technical Manual Getting started Using the audio features There are four audio interfaces supported on the VIPER: amp out, line out, line in and microphone. The line in, line out and amp interfaces support stereo signals and the microphone provides a mono input. The amplified output is suitable for driving an 8Ω...
  • Page 17 VIPER Technical Manual Getting started Using the PC/104 expansion bus PC/104 modules can be used with the VIPER to add extra functionality to the system. This interface supports 8/16 bit ISA bus style peripherals. Eurotech Ltd has a wide range of PC/104 modules, which are compatible with the VIPER.
  • Page 18: Detailed Hardware Description

    VIPER Technical Manual Detailed hardware description Detailed hardware description The following section provides a detailed description of the functions provided by the VIPER. This information may be required during development after you have started adding extra peripherals or are starting to use some of the embedded features.
  • Page 19: Viper Address Map

    VIPER Technical Manual Detailed hardware description VIPER address map PXA255 Bus/register chip select Physical address width Description 0xA4000000 – 0xFFFFFFFF Reserved SDCS0 0xA0000000 – 0xA3FFFFFC 32-bit SDRAM, IC2&3 0x4C000000 – 0x9FFFFFFF Reserved 0x48000000 – 0x4BFFFFFF 32-bit Memory Control Registers 0x44000000 – 0x47FFFFFF...
  • Page 20: Translations Made By The Mmu

    VIPER Technical Manual Detailed hardware description Translations made by the MMU For details of translations made by the MMU by Redboot for embedded Linux, please refer to the VIPER Embedded Linux AEL Technical Manual. For details of translations made by the MMU by Redboot for VxWorks, please refer to the VIPER VxWorks Quickstart and Technical Manual.
  • Page 21: Pxa255 Processor

    VIPER Technical Manual Detailed hardware description PXA255 processor The PXA255 is a low power ARM (version 5TE) instruction set compliant RISC processor. The PXA255 does not include a floating-point unit. The device does, however, contain a DSP co-processor to enhance multimedia applications.
  • Page 22: Pxa255 Gpio Pin Assignments

    VIPER Technical Manual Detailed hardware description PXA255 GPIO pin assignments The following table summarizes the use of the 85 PXA255 GPIO pins, their direction, alternate function and active level. For embedded Linux the GPIO pins are setup by Redboot. Under VxWorks and Windows CE, they are setup by the OS and not by the bootloader.
  • Page 23 VIPER Technical Manual Detailed hardware description GPIO No AF Signal name Active Sleep Function See section… FLASH_ STATUS Input Input Bootloader FLASH I nterrupt assignments 4 9 H Status, (page 0) and F LASH 3 0 5 H 3 0 6 H...
  • Page 24 VIPER Technical Manual Detailed hardware description GPIO No AF Signal name Active Sleep Function See section… RXD1 Input Input COM1 Receive Data CTS1 Input Input COM1 Clear To Send DCD1 Input Input COM1 Data Carrier Detect DSR1 Input Input COM1 Data Sender...
  • Page 25 VIPER Technical Manual Detailed hardware description GPIO No AF Signal name Active Sleep Function See section… LCD_D0 Output NA LCD Data Bit 0 LCD_D1 Output NA LCD Data Bit 1 LCD_D2 Output NA LCD Data Bit 2 LCD_D3 Output NA...
  • Page 26: Real Time Clock

    VIPER Technical Manual Detailed hardware description Real time clock There are two RTCs on the VIPER. Under embedded Linux and VxWorks the internal RTC of the PXA255 should only be used for power management events, and an external Dallas DS1338 RTC should be used to keep the time and date. Under Windows CE the time and date stamps are copied from the external RTC to the internal RTC of the PXA255, to run the RTC internally.
  • Page 27: Memory

    VIPER Technical Manual Detailed hardware description Memory The VIPER has four types of memory fitted: • 1MB of bootloader FLASH containing Redboot to boot embedded Linux or VxWorks, or Eboot to boot Windows CE. • A resident FLASH disk containing the OS and application images.
  • Page 28 VIPER Technical Manual Detailed hardware description Static RAM The VIPER has a 256KB SRAM device fitted, arranged as 256Kbit x 8-bits. Access to the device is on 16-bit boundaries; whereby the least significant byte is the SRAM data and the 8-bits of the most significant byte are don’t care bits. The reason for this is that the PXA255 is not designed to interface to 8-bit peripherals.
  • Page 29 VIPER Technical Manual Detailed hardware description Interrupt configuration and reset register [ICR] Byte lane Most Significant Byte Least Significant Byte 15 14 13 12 Field R_DIS AUTO_ RETRIG Reset Address 0x14100002 ICR Bit Functions Name Value Function No interrupt retrigger (embedded Linux and VxWorks).
  • Page 30: Interrupt Assignments

    VIPER Technical Manual Detailed hardware description Interrupt assignments Internal interrupts For details on the PXA255 interrupt controller and internal peripheral interrupts please see the PXA255 Developer’s Manual on the Development Kit CD. External interrupts The following table lists the PXA255 signal pins used for generating external interrupts.
  • Page 31 VIPER Technical Manual Detailed hardware description PC/104 interrupt register [PC104I1] Byte lane Most Significant Byte Least Significant Byte 15 14 13 12 Field IRQ12 IRQ11 IRQ10 IRQ7 IRQ6 IRQ5 IRQ4 IRQ3 Reset Address 0x14100000 PC/104 interrupt register [PC104I2] (not available under Windows CE)
  • Page 32 VIPER Technical Manual Detailed hardware description ICR Bit Functions Name Value Function No interrupt retrigger (embedded Linux and VxWorks) RETRIG Interrupt retrigger (Windows CE) No auto clear interrupt / Toggle GPIO1 on new interrupt (embedded Linux and VxWorks) AUTO_CLR Auto clear interrupt / pulse low for 1.12µs on GPIO1 on...
  • Page 33 VIPER Technical Manual Detailed hardware description PC/104 interrupts under Windows CE Write 0x2 to the ICR Register so that the first PC/104 interrupt source causes the PXA255 PC/104 interrupt pin GPIO1 to receive a low to high transition. When the first PC/104 interrupt occurs the Interrupt service routine will start polling through the PC/104 interrupt sources in the PC104I1 register.
  • Page 34: Flat Panel Display Support

    VIPER Technical Manual Detailed hardware description Flat panel display support The PXA255 processor contains an integrated LCD display controller that permits 1, 2 and 4-bit grey-scale, and 8 or 16-bit colour pixels. A 256-byte palette RAM provides flexible colour mapping capabilities. The LCD display controller supports active (TFT) and passive (STN) LCD displays.
  • Page 35 VIPER Technical Manual Detailed hardware description TFT panel data bit mapping to the VIPER Panel data bus bit 18-bit TFT 12-bit TFT 9-bit TFT FPD 15 FPD 14 FPD 13 FPD 12 FPD 11 FPD 10 FPD 9 FPD 8...
  • Page 36 VIPER Technical Manual Detailed hardware description STN panel data bit mapping to the VIPER Panel data bus bit Dual scan colour STN Single scan colour STN Dual scan mono STN FPD 15 DL7(G) FPD 14 DL6(R) FPD 13 DL5(B) FPD 12...
  • Page 37 VIPER Technical Manual Detailed hardware description Typically the power up sequence is as follows (please check the datasheet for the particular panel in use): Enable display VCC. Enable flat panel interface. Enable backlight. Power down is in reverse order. LCD backlight enable The PXA255 GPIO9 pin controls the LCD inverter supply voltage for the backlight.
  • Page 38 VIPER Technical Manual Detailed hardware description STN BIAS voltage The VIPER provides a negative and a positive bias voltage for STN type displays. The negative and positive bias voltages are set to –22V and +22V respectively. Pin connections for these can be found in the section PL3 –...
  • Page 39 VIPER Technical Manual Detailed hardware description VIPER-FPIF1 connectors LK1 – TFT clock delay selection It has been found that some TFT displays require a delay on the clock. If this is required fit the jumper in position A; if not, then fit in position B.
  • Page 40 VIPER Technical Manual Detailed hardware description PL2 – Generic LCD connector Connector: Taicom TI34BHS, 34-way, 2.54mm (0.1”) x 2.54mm (0.1”) straight-boxed header Mating connector: Fujitsu FCN-723-B034/2 Mating connector crimps: Fujitsu FCN-723J-AU/Q. (As it is possible to connect a crimp type connector to PL2, a wide range of LCD displays can be connected with a custom cable.)
  • Page 41 VIPER Technical Manual Detailed hardware description PL3 – Direct connection to a NEC NL3224BC35-20 5.5inch 320x240 TFT display Connector: Oupiin 2345-33TD2/SN Mating cable: Eunsung 0.5x33x190xAx0.035x0.3x5x5x10x10 Signal name Signal name FPD 10 PCLK LCLK (HSYNC) FCLK (VSYNC) FPD 0 FPD 1...
  • Page 42 VIPER Technical Manual Detailed hardware description PL4 – Backlight inverter connector Connector: FCI 76384-407LF Mating connector: FCI 65240-007LF Mating connector crimps: FCI 76357-401LF Signal name PWM0 BKLEN# BKLSAFE BKLSAFE PL5 – STN Bias connector Connector: FCI 76384-404LF Mating connector: FCI 65240-004LF...
  • Page 43 VIPER Technical Manual Detailed hardware description FPIF-LVDS-TX details The FPIF-LVDS-TX enables LVDS displays to be connected to the VIPER. The FPIF-LVDS-TX in combination with the FPIF-LVDS-RX allows the VIPER to drive a TFT or STN LCD flat panel display up to 10 meters away.
  • Page 44 VIPER Technical Manual Detailed hardware description FPIF-LVDS-TX connectors JP1 – TX strobe selection his link selects the edge of the TX strobe. Rising edge TX Strobe (default) If the jumper is fitted (default) then the TX Strobe shall be on the rising edge. If no jumper is fitted then the TX Falling edge TX Strobe shall be on the falling edge.
  • Page 45 VIPER Technical Manual Detailed hardware description J1 – VIPER LCD cable connector Connector: Oupiin 3215-40CSB/SN, 40-way, 1.27mm (0.05”) x 2.54mm (0.1”) straight- boxed header Mating connector: Oupiin 1203-40GB/SN Signal name Signal name HSYNC CLOCK VSYNC FPD 15 FPD 14 FPD 13...
  • Page 46 VIPER Technical Manual Detailed hardware description J2 – LVDS Hirose connector Connector: Hirose DF13-20DP-1.25V(55), 20-way, 1.27mm (0.05”) double row straight pin header FPIF-LVDS-TX Hirose mating connector: Hirose DF13-20DS-1.25C FPIF-LVDS-TX Hirose mating connector crimps: Hirose DF13-2630SCF LVDS panel mating connector: Hirose DF14-20S-1.25C...
  • Page 47 VIPER Technical Manual Detailed hardware description J3 – LVDS MDR connector Connector: 3M 10220-55G3PL, 20-way, 1.27mm (0.05”) Board mount Through-Hole Right Angle Receptacle – Shielded Mating cable: 3M 14520-EZAB-XXX-0EX, 3M™ Mini D Ribbon (MDR) Cable Assembly) Signal name Signal name...
  • Page 48 VIPER Technical Manual Detailed hardware description FPIF-LVDS-RX details The FPIF-LVDS-RX in combination with the FPIF-LVDS-TX allows the VIPER to drive a TFT or STN LCD flat panel display up to 10 meters away. The connectors on the following pages are shown in the same orientation as the picture above, unless otherwise stated.
  • Page 49 VIPER Technical Manual Detailed hardware description FPIF-LVDS-RX connectors JP1 – LCD power selection 3.3V LCD power his link selects the voltage supply of the LCD (default) panel. Fit the jumper in position 3.3V (default) to supply 5V LCD power 3.3V to the LCD panel, or in position 5V to supply 5V to the LCD panel.
  • Page 50 VIPER Technical Manual Detailed hardware description J1 – VIPER LCD cable connector Connector: Oupiin 3215-40CSB/SN, 40-way, 1.27mm (0.05”) x 2.54mm (0.1”) straight- boxed header Mating connector: Oupiin 1203-40GB/SN Signal name Signal name HSYNC CLOCK VSYNC FPD 15 FPD 14 FPD 13...
  • Page 51 VIPER Technical Manual Detailed hardware description J2 – LVDS Hirose connector Connector: DF13-20DP-1.25V(55), 20-way, 1.27mm (0.05”) double row straight pin header FPIF-LVDS-RX Hirose mating connector: Hirose DF13-20DS-1.25C FPIF-LVDS-RX Hirose mating connector crimps: Hirose DF13-2630SCF Eurotech Ltd recommended cable: Amphenol 165-2899-941 through to 165-2899-960...
  • Page 52 VIPER Technical Manual Detailed hardware description J3 – LVDS MDR connector Connector: 3M 10220-55G3PL, 20-way, 1.27mm (0.05”) Board mount Through-Hole Right Angle Receptacle – Shielded Mating cable: 3M 14520-EZAB-XXX-0EX, 3M™ Mini D Ribbon (MDR) Cable Assembly) Signal name Signal name...
  • Page 53 VIPER Technical Manual Detailed hardware description FPIF-CRT details The FPIF-CRT allows the VIPER to drive a CRT Monitor or an analogue LCD flat panel. Sync on green and composite sync monitors are not supported. The connectors on the following pages are shown in the same orientation as the picture above, unless otherwise stated.
  • Page 54 VIPER Technical Manual Detailed hardware description FPIF-CRT connectors J1 – VIPER LCD cable connector Connector: Oupiin 3215-40CSB/SN, 40-way, 1.27mm (0.05”) x 2.54mm (0.1”) straight- boxed header Mating connector: Oupiin 1203-40GB/SN (available from Eurotech Ltd on request) Signal name Signal name...
  • Page 55 VIPER Technical Manual Detailed hardware description J2 – CRT connector Connector: Oupiin 7916-15FA/SN, 15-way, female, high density, right-angled D-Sub. Signal name Signal name Signal name RED GND GREEN GREEN GND 12 BLUE BLUE GND HSYNC 5V_VGASAFE 14 VSYNC (As viewed from...
  • Page 56: Audio

    VIPER Technical Manual Detailed hardware description Audio A National Semiconductor LM4549 AC’97 audio CODEC is used to support the audio features of the VIPER. Audio inputs supported by the LM4549 are stereo line in and a mono microphone input. The LM4549 provides a stereo line out that can also be amplified by a National Semiconductor LM4880 250mW per channel power amplifier, suitable for driving an 8Ω...
  • Page 57: General Purpose I/O

    VIPER Technical Manual Detailed hardware description General purpose I/O Eight general-purpose input lines and eight general-purpose output lines are provided on connector PL9. To read from IN[0:7], read the least significant byte located at offset 0x500000 from CS5 (0x14000000) to sample the 8 inputs from PL9.
  • Page 58 VIPER Technical Manual Detailed hardware description To write to OUT[0:7], write to the following PXA255 processor GPIO lines to drive the outputs. VIPER outputs PXA255 GPIO OUT0 GPIO20 OUT1 GPIO21 GPIO[20:27] OUT[0:7] PXA255 Transceiver OUT2 GPIO22 OUT0B OUT3 GPIO23 OUT4...
  • Page 59 VIPER Technical Manual Detailed hardware description The general-purpose inputs are 5V tolerant, and the outputs can sink and source up to 24mA @ 3.3V. OUT0B is an inverted OUT0 signal, and is driven to 3.3V, which provides compatibility with the VIPER-UPS.
  • Page 60: Usb Host Interface

    VIPER Technical Manual Detailed hardware description USB host interface There are two USB interfaces on the VIPER. These comply with the Universal Serial Bus Specification Rev. 1.0a, supporting data transfer at full-speed (12 Mbit/s) and low- speed (1.5 Mbit/s). There are four signal lines associated with each USB channel: •...
  • Page 61: Usb Client Interface

    VIPER Technical Manual Detailed hardware description USB client interface The VIPER provides one USB 1.1 client interface. The connection between PL17 and a USB Type A connector is detailed in the following illustration: USB Type A Plug USBC - USBC + PL17 ©...
  • Page 62: 10/100Basetx Ethernet

    VIPER Technical Manual Detailed hardware description 10/100BaseTX Ethernet An SMSC LAN91C111 Ethernet controller provides a single 10/100BaseTX interface. The device provides an embedded PHY and MAC, and complies with the IEEE802.3u 10/100BaseTX and IEEE 802.3x full-duplex flow control specifications. Configuration data and MAC information are stored in an external 93C46 EEPROM.
  • Page 63 VIPER Technical Manual Detailed hardware description Ethernet signal mapping between VIPER and Ethernet breakout connectors Ethernet breakout PL1 – Ethernet breakout PL3 - VIPER PL1 – 10/100BaseTX 2x4-way header RJ45 Ethernet connector Signal name Signal name Signal name Bob Smith...
  • Page 64: Serial Coms Ports

    VIPER Technical Manual Detailed hardware description Serial COMs ports There are five high-speed, fully functionally compatible 16550 serial UARTs on the VIPER. Four of these channels can be used as standard RS232 serial interfaces, and the remaining one (COM5) can be configured as RS422 or RS485.
  • Page 65 VIPER Technical Manual Detailed hardware description COM4 – RS232 interface Supported on Channel 0 of an external Exar XR16C2850 with 128bytes of Tx and Rx FIFOs, and buffered to RS232 levels with ±15kV ESD protection. The maximum baud rate on this channel is 115.2kb/s. On special request this can be increased to 921.6kb/s.
  • Page 66 VIPER Technical Manual Detailed hardware description Typical RS422 and RS485 connection RS422 POINT-TO-POINT RS422 MULTI-DROP RS485 MULTI-DROP Number of Wires Number of Wires Number of Wires Transmitters Enabled always Transmitters Enabled active RTS Transmitters Enabled active RTS Receivers Enabled always...
  • Page 67: Pc/104 Interface

    VIPER Technical Manual Detailed hardware description PC/104 interface The VIPER PC/104 interface is emulated from the PXA255 PCMCIA interface to support 8/16 bit ISA bus style signals. As the interface is an emulation the VIPER does not support some PC/104 features. Please refer to the...
  • Page 68 VIPER Technical Manual Detailed hardware description VIPER PC/104 interface details The PC/104 bus signals are compatible with the ISA bus electrical timing definitions. For details of PC/104 Interrupts please see P C/104 interrupts, page 3 7 4 H 3 7 5 H All signals (except interrupts) between the PXA255 and the PC/104 are buffered.
  • Page 69 VIPER Technical Manual Detailed hardware description PC/104 16-bit I/O read/write access cycles BALE SBHE A<0:15> VALID VALID IOCS16 IOCHRDY IOR/IOW DATA (read) VALID VALID DATA (write) VALID VALID PC/104 8-bit memory write access cycle BALE SBHE A<0:23> VALID VALID MEMCS16...
  • Page 70 VIPER Technical Manual Detailed hardware description PC/104 16-bit memory read/write access cycles BALE SBHE A<0:23> VALID VALID MEMCS16 IOCHRDY (S)MEMR/(S)MEMW DATA (read) VALID VALID DATA (write) VALID VALID Unsupported PC/104 interface features The PC/104 bus features not supported by the VIPER are as follows: •...
  • Page 71: Tpm

    VIPER Technical Manual Detailed hardware description The PXA255 I C interface is brought out to the COMs connector PL4, see P L4 – 7 3 H COMS ports, page 9, for connection details. 3 7 6 H The I C unit supports a fast mode operation of 400Kbits/s and a standard mode of 100Kbits/s.
  • Page 72: Jtag And Debug Access

    VIPER Technical Manual Detailed hardware description JTAG and debug access Debug access to the PXA255 processor is via the JTAG connector PL10. The Macraigor W iggler and EPI M ajic probe have been used to debug the PXA255 7 6 H 7 7 H processor on the VIPER.
  • Page 73: Power And Power Management

    VIPER Technical Manual Power and power management Power and power management Power supplies The VIPER is designed to operate from a single +5V ±5% (4.75V to +5.25V) supply. The power connector PL16 has a +12V connection defined, but is not required for the VIPER under normal operation.
  • Page 74: Power Management

    VIPER Technical Manual Power and power management Power management All VIPER power-down features and alteration of PXA255 operating frequency are fully supported under Embedded Linux and VxWorks. Windows CE currently provides no power management support. To simplify the power consumption estimation of the VIPER, the following sections break down the process as follows: •...
  • Page 75 VIPER Technical Manual Power and power management Processor current estimations The current values in the tables below are referenced from running the VIPER at 400MHz in performance mode whilst the VIPER is idle. The positive values (not shown in brackets) are the current saving by running the VIPER at slower frequencies or in power saving mode.
  • Page 76 VIPER Technical Manual Power and power management Current saving from 5V when processor core is in power saving mode Processor Vcore (V) 400MHz 300MHz 200MHz 100MHz Asleep CCCR=0x241 CCCR=0x321 CCCR=0x221 CCCR=0x121 Active 1.29 -99mA ±20mA Active -46mA ±20mA Active 1.06 -32mA ±20mA -25mA ±20mA...
  • Page 77 VIPER Technical Manual Power and power management Power savings Use the table below to estimate power savings that can be achieved by shutting down features of the VIPER, or putting the VIPER to sleep. Power saving mode Performance mode Current...
  • Page 78 VIPER Technical Manual Power and power management External peripheral device power estimations Take into account any external peripherals for your application, such as: • USB devices: keyboard, memory stick and mouse. • CompactFLASH socket: CompactFLASH memory or Microdrive. • Flat panel display: TFT logic + backlight, STN logic + backlight + bias voltage.
  • Page 79 VIPER Technical Manual Power and power management Power estimate examples Example 1: VIPER [Linux] asleep (microprocessor in sleep mode and every power saving option enabled) In this case, the power consumed by the respective categories is: • VIPER current (Linux default) = 334mA ±3mA.
  • Page 80 VIPER Technical Manual Power and power management Example 3: VIPER [Windows CE] at 400MHz in power saving mode + LCD with backlight on + 64MB FlashDio™ USB memory stick In this case, the power consumed by the respective categories is: •...
  • Page 81 VIPER Technical Manual Power and power management Processor power management The power manager in the PXA255 offers the ability to disable the clocks to the different internal peripherals. By default, all clocks are enabled after reset. To reduce power consumption disable the clocks for any unused peripherals.
  • Page 82 VIPER Technical Manual Power and power management To communicate with the VCORE DAC, use the following pins to emulate the LTC1659 interface: GPIO LTC1659 DAC pin function GPIO6 Data GPIO11 Clock GPIO19 Chip Select Before putting the PXA255 into sleep mode, ensure the R_DIS bit in the ICR register is set to ‘1’.
  • Page 83 VIPER Technical Manual Power and power management UART power management COM4 and COM5 are generated from an external Exar XR16C2850 DUART. This device supports a sleep mode. By enabling this feature the DUART enters sleep mode when there are no interrupts pending. Please see the XR16C2850 datasheet on the Development Kit CD for information on enabling the sleep mode.
  • Page 84 VIPER Technical Manual Power and power management Audio power management The audio interface supports the AC’97 low power modes. Shutting down the digital and analogue interfaces can reduce consumption by up to 38mA ±3mA (190mW ±15mW). To shut down the AC’97 Codec, the software must write to the relevant bits in the Powerdown Control / Status Register (26h).
  • Page 85: Connectors, Leds And Jumpers

    VIPER Technical Manual Connectors, LEDs and jumpers Connectors, LEDs and jumpers The following diagram shows the location of the connectors, LEDs and jumpers on the VIPER: PL16 PL11 & PL12 PL10 Flash Access PL17 The connectors on the following pages are shown in the same orientation as the picture above, unless otherwise stated.
  • Page 86: Connectors

    VIPER Technical Manual Connectors, LEDs and jumpers Connectors There are 13 connectors on the VIPER for accessing external devices: Connector Function Connector details in section… 10/100BaseTX Ethernet P L1 – 10/100BaseTX Ethernet connector, 4 0 4 H interface page 4 0 5 H Ethernet controller status P L2 –...
  • Page 87 VIPER Technical Manual Connectors, LEDs and jumpers PL1 – 10/100BaseTX Ethernet connector Connector: Oupiin 2015-2X4GD/SN, 8-way, 2.54mm (0.1”) x 2.54mm (0.1”) dual row header Mating connector: FCI 71600-008LF Signal name Signal name LANGND PL2 – Ethernet status LEDs connector Connector: Neltron 2417SJ-06-PHD, 6-way, 2mm (0.079”) x 2mm (0.079”) pin housing...
  • Page 88 VIPER Technical Manual Connectors, LEDs and jumpers PL3 – LCD connector Connector: Oupiin 3214-40C00RBA/SN, 40-way, 1.27mm (0.05”) x 2.54mm (0.1”) right angled boxed header Mating connector: Oupiin 1203-40GB/SN Signal name Signal name BLKEN# BLKSAFE NEGBIAS LCDSAFE GPIO16/PWM0 POSBIAS FPD0 FPD1...
  • Page 89 VIPER Technical Manual Connectors, LEDs and jumpers PL4 – COMS ports Connector: Oupiin 3012-40GRB/SN, 40-way, 2.54mm (0.1”) x 2.54mm (0.1”) dual row IDC boxed header Mating connector: FCI 71600-040LF Signal name Signal name SCL (I SDA (I GND (I 3.3V (I...
  • Page 90 VIPER Technical Manual Connectors, LEDs and jumpers PL5 – CompactFLASH connector Connector: 3M N7E50-N516RB-50, 50-way CompactFLASH Type II connector Signal name Signal name /CD1 /CE2 /CE1 /VS1 (GND) /IORD /IOWR RDY/BSY +3.3V +3.3V CSEL (GND) /RESET WAIT /INPACK (NU) /REG...
  • Page 91 VIPER Technical Manual Connectors, LEDs and jumpers PL6 – Audio connector Connector: Oupiin 2015-2X6GDB/SN, 12-way, 2.54mm (0.1”) x 2.54mm (0.1”) dual row header Mating connector: FCI 71600-014LF (with pins 13 and 14 blanked off) Signal name Signal name LEFT IN...
  • Page 92 VIPER Technical Manual Connectors, LEDs and jumpers PL8 – TPM Tamper detect connector (optional) Connector: JST B2B-ZR(LF)(SN), 2-way, single row, 1.5 mm (0.06”) Shrouded Header Mating housing: JST ZHR-2 Mating housing crimps: JST SZH-002T-P0.5 Signal name Signal name VCC_BACKUP TPM_TAMPER_DETECT PL9 –...
  • Page 93 VIPER Technical Manual Connectors, LEDs and jumpers PL10 – JTAG connector Connector: Oupiin 2011-2x5GSB/SN, 10-way, 2.54mm (0.1”) x 2.54mm (0.1”) dual row header Mating connector: FCI 71600-010LF Signal name Signal name VCC3 nTRST TCLK SRST © 2007 Eurotech Ltd Issue E...
  • Page 94 VIPER Technical Manual Connectors, LEDs and jumpers PL11 & PL12 – PC/104 connectors Connectors: • Astron 25-1201-232-2G-R, 64-way, 2.54mm (0.1”) x 2.54mm (0.1”) Stackthrough PC/104 compatible connector (row A & B) • Astron 25-1201-220-2G-R, 40-way, 2.54mm (0.1”) x 2.54mm (0.1”) Stackthrough PC/104 compatible connector (row C &...
  • Page 95 VIPER Technical Manual Connectors, LEDs and jumpers PL16 – Power connector Connector: Molex 22-05-7058, 5-way, 2.54mm (0.1") Pitch KK® Header - Right Angle Friction Lock 7395 series connector Mating connector: Molex 22-01-2055, 5-way, 2.54mm (0.1") Pitch KK® Crimp Terminal Housing 2695 series connector...
  • Page 96 VIPER Technical Manual Connectors, LEDs and jumpers JP1 – RS485/422 configuration jumpers Connector: Oupiin 2011-2x5GSB/SN, 10-way, 2.54mm (0.1”) x 2.54mm (0.1”) dual row through-hole unshrouded header Signal name Signal name PL4_RX5- PL4_RX5+ RX5- RX5+ PL4_RX5/TX5- PL4_RX5/TX5+ PL4_RX5+ RX5-_120R PL4_RX5/TX5+ RX5/TX5-_120R JP2 –...
  • Page 97: Status Leds

    VIPER Technical Manual Connectors, LEDs and jumpers Status LEDs There is a single status LED on the VIPER, which indicates FLASH access to the bootloader FLASH or the main FLASH memory/silicon disk. © 2007 Eurotech Ltd Issue E...
  • Page 98: Jumpers

    VIPER Technical Manual Connectors, LEDs and jumpers Jumpers There are seven user selectable jumpers on the VIPER. Their use is explained below. Default settings The default positions of the jumpers are shown below. Jumper functions described in silkscreen on the board are shown in blue.
  • Page 99 VIPER Technical Manual Connectors, LEDs and jumpers RS485/422 configuration – LK4, LK5, LK6 and LK7 on JP1 These jumpers are used to enable/disable the RS485 receive buffer and RS485/422 line termination. See C OM5 – RS422/485 interface, page 5, for more details.
  • Page 100 VIPER Technical Manual Connectors, LEDs and jumpers LCD supply voltage – LK8 on JP2 This jumper selects the supply voltage for the LCD logic supply. Description Supply LCD logic with 5V. Default setting: Supply LCD logic with 3.3V. If the LCD requires a 5V supply, please refer to the LCD datasheet to ensure that the display is compatible with 3.3V logic.
  • Page 101: Appendix A - Contacting Eurotech

    VIPER Technical Manual Appendix A – Contacting Eurotech Appendix A – Contacting Eurotech Eurotech sales Eurotech’s sales team is always available to assist you in choosing the board that best meets your requirements. Eurotech Ltd 3 Clifton Court Cambridge CB1 7BN...
  • Page 102: Appendix B - Specification

    VIPER Technical Manual Appendix B – Specification Appendix B – Specification Microprocessor 400MHz (VIPER) or 200MHz (VIPER-Lite) PXA255 processor. Memory 16MB, 64MB 3.3V un-buffered SDRAM. 16MB, 32MB Intel StrataFLASH. 1MB Bootloader ROM. 256k SRAM (battery backed). Graphics controller PXA255 Flat panel controller offering resolutions: •...
  • Page 103: Appendix C - Mechanical Diagram

    VIPER Technical Manual Appendix C – Mechanical diagram Appendix C – Mechanical diagram Unit of measure = mm (1inch = 25.4mm) Chassis ground mounting positions 4.44 5.57 95.89 93.47 93.22 90.80 Ø3.18 FOUR (A) HOLES 88.61 82.55 56.36 53.34 53.09 41.72...
  • Page 104: Appendix D - Reference Information

    VIPER Technical Manual Appendix D – Reference information Appendix D – Reference information Product information Product notices, updated drivers, support material, 24hr-online ordering: www.eurotech-ltd.co.uk PC/104 Consortium PC/104 specifications, vendor information and available add on products: www.PC/104.org USB Information Universal Serial Bus (USB) specification and product information: www.usb.org...
  • Page 105 VIPER Technical Manual Appendix D – Reference information National Semiconductor Corporation National Semiconductor LM4549 AC’97 Codec documentation: w ww.national.com 1 1 2 H Koninklijke Philips Electronics N.V. Philips ISP1160 USB host controller documentation: w ww.philips.com 1 1 3 H Maxim Integrated Products Inc.
  • Page 106: Appendix E - Acronyms And Abbreviations

    VIPER Technical Manual Appendix E – Acronyms and abbreviations Appendix E – Acronyms and abbreviations Amplifier Advanced Technology Attachment BTUART Bluetooth Universal Asynchronous Receiver / Transmitter Control Area Network CCCR Core Clock Configuration Register Compact Flash Common FLASH Interface CODEC...
  • Page 107 VIPER Technical Manual Appendix E – Acronyms and abbreviations Random Access Memory Regulator public key cryptosystem invented by Rivest, Shamir and Adleman Real Time Clock Receive Single Board Computer SDRAM Synchronous Dynamic Random Access Memory SRAM Static Random Access Memory...
  • Page 108: Appendix F - Rohs-6 Compliance - Materials Declaration Form

    VIPER Technical Manual Appendix F – RoHS-6 Compliance - Materials Declaration Form Appendix F – RoHS-6 Compliance - Materials Declaration Form Confirmation of Environmental Compatibility for Supplied Products Substance Maximum concentration Lead 0.1% by weight in homogeneous materials Mercury 0.1% by weight in homogeneous materials Hexavalent chromium 0.1% by weight in homogeneous materials...
  • Page 109: Index

    VIPER Technical Manual Index Index PC/104 · 94 power · 95 active display signal · 36 USB · 91 address map · 19 contact details · 101 amplifier · 5, 7, 16, 56 controller, graphics · 102 anti-static · 12 custom configurations ·...
  • Page 110 VIPER Technical Manual Index I/O · 5, 6 passive display signal · 36 Intel PXA255 · 4 PC/104 · 30, 67 interface, USB · 60 consortium · 104 internal interrupt · 30 interface · 5 interrupt · 30 PC/104 interrupts external ·...
  • Page 111 VIPER Technical Manual Index RS232 · 7, 15, 64, 65 RS422 · 7, 15, 65, 99, 100 UART · 7 RS485 · 7, 15, 65, 99, 100 power management · 83 RTC · 8, 26 USB · 5, 6, 7, 16, 104 connector ·...

This manual is also suitable for:

Viper-lite

Table of Contents