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USER MANUAL TITAN Single Board Computer Issue B – December 2012 – ETH_TITAN_V2_USM DIGITAL TECHNOLOGIES FOR A BETTER WORLD www.eurotech.com...
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TITAN - user manual WARRANTY For Warranty terms and conditions users should contact their local Eurotech Sales Office. TRADEMARKS All trademarks both marked and not marked appearing in this document are the property of their respective owners. REVISION HISTORY Issue no.
Eurotech reserves the right to revise this document and to change its contents at any time without obligation to notify any person of such revision or changes.
To avoid damage caused by ESD (Electro Static Discharge), always use appropriate antistatic precautions when handing any electronic equipment. Life support policy Eurotech products are not authorized for use as critical components in life support devices or systems without the express written approval of Eurotech. CE notice...
When transporting any module or system, for any reason, it should be packed using anti-static material and placed in a sturdy box with enough packing material to adequately cushion it. Any product returned to Eurotech that is damaged due to inappropriate packaging will not be covered by the warranty! Device labelling The TITAN board name label is affixed to the PC/104 connector J13.
TITAN - user manual Introduction The TITAN is an ultra low power PC/104 compatible single board computer based on the Marvell 520MHz PXA270 XScale processor. The PXA270 is an implementation of the Intel XScale micro architecture combined with a comprehensive set of integrated peripherals, including: •...
TITAN - user manual TITAN features Microprocessor • 520MHz (commercial operating temperature) / 416MHz (industrial operating temperature) PXA270 processor. Cache • 32K data cache, 32K instruction cache, 2K mini data cache. System memory • Fixed on-board memory: 64/128MB SDRAM (32-bit wide SDRAM data bus).
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Introduction Video • 18-bit flat panel interface for STN and TFT displays on 40-pin boxed connector. • Up to 800x600 resolution. • 8/16bpp. • Backlight control. • Optional LVDS interface. • LCD voltage (3.3V / 5V) selection jumper. • LVDS encoding mode selector jumper (for signalling decoding LVDS display receiver). Audio and touchscreen •...
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TITAN - user manual Test support • JTAG interface (10-pin 1mm pitch header). • Download data to FLASH memory. • Debug and connection to In-Circuit Emulator (ICE). Power requirements • Typically 1.5W from a single 5V supply. • Power management features allow current requirements to be as low as 20mA (100mW) in sleep mode and 2mA (10mW) in deep sleep mode.
Appendix E - ZEUS-FPIF details, page 86, for further details. • ZEUS-FPIF-CRT, a board that allows the TITAN to drive a CRT monitor or an analogue LCD flat panel. Sync on green and composite sync monitors are not supported. •...
Using the USB client The TITAN USB host port 2 can be configured under software to be a client and connected to a PC via a USB cable. The USB cable should be plugged into the 10-way header J10. See the sections USB, page J10 –...
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Contact details are provided in Eurotech Worldwide Presence. To use a PC/104 board with the TITAN, plug it into J13 for 8-bit cards and J13/J14 for 8/16-bit cards. See the sections PC/104 interface, page J14 &...
TITAN - user manual Detailed hardware description The following section provides a detailed description of the functions provided by the TITAN. This information may be required during development after you have started adding extra peripherals or are starting to use some of the embedded features.
One source of this information is on the MSDN web site (www.msdn.microsoft.com) under Windows CE Memory Architecture. PXA270 processor The TITAN board is based on a PXA270 processor, www.marvell.com/processors/applications/pxa_family/assets/pxa_27x_pb.pdf The PXA270 processor is an integrated system-on-a-chip microprocessor for high-performance, low- power portable handheld and handset devices.
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Detailed hardware description The design supports 520MHz and416MHz speed variants of the PXA270 processor. The standard variant of the TITAN board includes the 520MHz version of the PXA270. The maximum speed available for extended temperature version of the TITAN is 416MHz.
TITAN - user manual PXA270 GPIO pin assignments The table below summarizes the use of the 118 PXA270 GPIO pins, their direction, alternate function and active level. For embedded Linux the GPIO pins are setup by Redboot. For Windows CE, they are setup by the OS and not by the boot loader.
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Detailed hardware description GPIO Wake-up No AF Signal name Active Function Sleep source See section… Shutdown COM 1, 2, 3 & 4 20 0 Output Low Serial COMs ports RS232_SHDN# 0 = off; 1 = on LVDS enable 21 0 LVDS_EN Output High LVDS interface 0 = off;...
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TITAN - user manual GPIO Wake-up No AF Signal name Active Function Sleep source See section… 0 MMC_WP Input High SD write protect status Input 0 MMC_CD Input Input High SD card detect Socket 0 & 1 high byte...
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Detailed hardware description GPIO Wake-up No AF Signal name Active Function Sleep source See section… COM5 0 = RS485 0 SEL_485# Output NA Serial COMs ports 1= RS422 [default] STN BIAS voltage Flat panel display 0 BIAS_EN Output NA 0 = off; 1 = on support 0 UNUSED Output NA...
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TITAN - user manual GPIO Wake-up No AF Signal name Active Function Sleep source See section… 109 1 MMDAT1 Bidir SD data 1 Input 110 1 MMDAT2 Bidir SD data 2 Input 111 1 MMDAT3 Bidir SD data 3 Input...
Detailed hardware description Interrupt assignments Internal interrupts For details of the PXA270 interrupt controller and internal peripheral interrupts, please refer to the PXA270 Developer’s Manual on the Development Kit CD. External interrupts The following table lists the PXA270 signal pins used for external interrupts: PXA270 pin Signal name Peripheral...
TITAN - user manual Real time clock The TITAN uses an external real time clock (RTC) (Intersil ISL1208) to store the date and time and provide power management events. The RTC is connected to the I C bus of the PXA270 processor and is accessible through I C bus address 0x6F.
Detailed hardware description Watchdog timer The TITAN uses an external watchdog timer (MAX6369), which can be used to protect against erroneous software. The watchdog timer can be programmed using WD_SET2-0 for timeout periods between 1ms and 60s. The WD_SET2-0 are programmed by writing to bit D4-D2 of the CPLD control register C_REG.
64KB. The TITAN also has a 256KB SRAM device fitted, arranged as 256Kbit x 8-bits. Access to the device is on 16-bit boundaries; whereby the least significant byte is the SRAM data and the 8-bits of the most significant byte are don’t care bits.
Detailed hardware description Configuration EEPROM The configuration EEPROM is interfaced directly to the PXA270’s I C controller. It is a Microchip 24AA01 1Kbit EEPROM organized as one block of 128 x 8-bit memory. The configuration EEPROM is addressable at I²C serial bus address 0x50 – 0x057 and is accessed in fast-mode operation at 400kbps.
The TITAN provides +5V (VCC_PER) to the PC/104 connectors J13 and J14. If a PC/104 add-on board requires a +12V supply, then +12V can be supplied via the TITAN power connector J15 pin 4. If -12V or -5V are required, these must be supplied directly to the PC/104 add-on board.
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Once the PXA270 microprocessor has serviced a PC/104 interrupt, the corresponding add-on-board clears the interrupt by driving the IRQ signal low. When the TITAN hardware sees the interrupt go low the corresponding bit is automatically cleared from the I1_REG or I2_REG register.
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In cases where other PC/104 IRQs are asserted while the driver is processing a PC/104 IRQ, the TITAN drives GPIO 17 low for 375ns to 500ns once this interrupt has been cleared. This short low pulse indicates to the PXA270 that there is another pending interrupt. This situation is shown in the...
Detailed hardware description Unsupported PC/104 interface features The TITAN does not support the following PC/104 bus features: • DMA is not supported. Therefore, AEN signal is set to a constant logical zero. • Bus mastering is not supported. Therefore, do not connect any other master add-on board to the TITAN PC/104 interface.
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The PXA270 can directly interface to 18-bit displays, but from a performance point of view it is better to use 16-bits only. 18-bit operation requires twice the bandwidth of 16-bit operation. The following table shows TFT panel data bit mapping to the TITAN: Panel data bus bit...
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Detailed hardware description STN panel data bit mapping to the TITAN Panel data bus bit Dual scan colour STN Single scan colour STN Dual scan mono STN FPD 15 DL7(G) FPD 14 DL6(R) FPD 13 DL5(B) FPD 12 DL4(G) FPD 11...
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TITAN - user manual LCD logic and backlight power The display signals are +3.3V compatible. The TITAN contains power control circuitry for the flat panel logic supply and backlight supply. The flat panel logic is supplied with a switched +3.3V (default) or +5V supply (see the section LCD supply voltage jumper –...
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GPIO 16 when it is configured as PWM. STN BIAS voltage The TITAN can provide a negative and a positive bias voltage for STN type displays. The negative and positive bias voltages are set to -22V and +22V respectively. Pin connections for these can be found in section J4 –...
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TITAN - user manual LVDS interface There is a Low-Voltage Differential Signalling (LVDS) interface available on the TITAN. LVDS combines high data rates with low power consumption. The benefits of LVDS include low-voltage power supply compatibility, low noise generation, high noise rejection and robust transmission signals.
The WM9712L AC’97 CODEC may be turned off if it is not required. See the section Audio power management, page 60, for details. Connection to the TITAN audio features is via header J6. See the table below for pin assignments and section J6 – Audio connector, page 68, for connector and mating connector details.
TITAN - user manual USB host There are two USB host interfaces on the TITAN. These comply with the Universal Serial Bus Specification Rev. 1.1, supporting data transfer at full-speed (12Mbps) and low-speed (1.5Mbps). There are four signal lines associated with each USB channel: VBUS, DATA+, DATA and GND. Their...
ALWAYS use the USB client cable provided with the development kit. This cable does not provide power to the cable and avoids reverse powering the TITAN from a USB host when the TITAN has no power applied to the VCC input on J15 pin 1. Reverse powering the TITAN from the VBUSn pins can make the TITAN operate erratically and may cause serious damage to the TITAN.
TITAN - user manual Serial COMs ports There are five high-speed, fully functionally compatible 16550 serial UARTs on the TITAN. Four of these channels can be used as RS232 serial interfaces and the remaining one, COM5, can be configured as RS422 or RS485.
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RS422 full duplex [default] The control signal SEL_TERM is used to enable/disable the RS422/485 line termination and must be enabled if the TITAN board is at the end of the network. This is shown in the following table: SEL_TERM (GPIO 115) COM5 termination resistors (120Ω)
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The TITAN uses the RTS signal to control transmission. When this signal is at logic ‘1’ the driver is switched off and data can be received from other devices. When the RTS line is at logic ‘0’ the driver is on.
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RTS Receivers enabled always Receivers enabled always Receivers enabled always Duplex mode full Duplex mode full Duplex mode half SEL_485# HIGH SEL_485# HIGH SEL_485# Only set SEL_TERM to logic high if the TITAN is at the end of the network.
TITAN - user manual I²C The PXA270 I²C interface is brought out to the COMs connector J1. See the section J1 – COMS ports, page 65, for connection details. The I²C bus is also used with the Quick Capture interface. See the section Quick Capture camera interface, page 51, for more information.
Detailed hardware description Quick Capture camera interface ® The Quick Capture interface is a component of Intel Quick Capture technology which provides a connection between the PXA270 processor and a camera image sensor. The Quick Capture interface is designed to work primarily with CMOS-type image sensors and supports resolutions up to 4 mega pixels.
Temperature sensor There is an NXP LM75BGD temperature sensor on the TITAN. The LM75BGD is a temperature-to- digital converter using an on-chip band-gap temperature sensor and Sigma-delta A-to-D conversion technique. The device is also a thermal detector providing an over-temperature detection output (OVERTEMP signal on GPIO 12), which can be used to wake the PXA270 up from sleep.
Majic probe have been used to debug the PXA270 processor on the TITAN. There are many other debug tools that can be interfaced to the TITAN for access to the JTAG Interface of the PXA270 processor. The tables below detail the pins connections between the TITAN and Macraigor...
CIF Camera interface. 2.8V The TITAN shall be reset if the supplies fall below the reset thresholds shown in the table above. VCC_CORE, VCC_PLL and VCC_SRAM rails are controlled by the PXA270 hardware control signal PWR_EN. They are switched off when the PXA270 is in sleep or deep-sleep mode.
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VCC_PER is a +5V supply, switched under hardware control from the VCC input on J15 pin 1. ALWAYS provide +5V to VCC on J15 pin 1. Care should be taken to ensure that any peripheral powered by the TITAN from VCC_PER does not introduce ripple or droop below the 4.38V reset threshold.
TITAN - user manual Processor power management First available in the PXA270 processor, wireless Intel SpeedStep® technology dynamically adjusts the power and performance of the processor based on CPU demand. This can result in a significant decrease in power consumption.
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(VCC_CORE, VCC_SRAM, VCC_PLL, VCC_IO excluding VCC_BATT) are powered off for minimized power consumption. On the TITAN, the main +3.3V rail supplies the VCC_IO power domain of the PXA270. Since the +3.3V supply is switched off in deep-sleep mode, all the on-board peripherals are powered off and it is not possible to use external wake-up sources.
TITAN - user manual Peripheral devices power management The following table gives the estimated power consumption of on-board peripherals: Low power mode On-board peripheral Maximum power consumption Minimum consumption Operating mode Ethernet LAN9221i 596mW (180mA on 3.3V) 11mW Power down (3.3mA on 3.3V)
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Power and power management The table below gives examples of the power drawn by specific external peripheral devices: Device Part number Condition Power (mW) Socket WiFi 802.11b WL6200-480 Idle (listening) SDIO Transmitting 64MB FlashDio™ USB FDU100A Inserted (no access) memory stick Reading consistently NEC 5.5"...
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If the USB voltage VBUSx is short-circuited, or more than 500mA is drawn from any VBUSx supply, the switch turns off the power supply and protects the device and board automatically. The VBUSx power supplies are derived from the TITAN +5V supply. The following table shows the PXA270 assignments for power enable and over-current signals:...
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Power and power management LVDS power management If the LVDS transmitter is not required it can be placed in power down mode by applying a high level to the PXA270 GPIO 21 LVDS_EN signal. The power consumption in power down mode is 180μW. This is shown in the following table: LVDS_EN (GPIO 21) LVDS operation status...
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TITAN - user manual P0-15 direction Current / Watts each Current / Watts all Input (floating) 0mA / 0mW 0mA / 0mW Input high (VCC_PER) 0mA / 0mW 0mA / 0mW Input high (3.3V) 0.17mA / 0.29mW 2.72mA / 4.62mW Input low (0V) 0.5mA / 2.5mW...
Connectors, LEDs and jumpers Connectors, LEDs and jumpers The following diagram shows the location of the connectors, LEDs and jumpers on the TITAN: J13 & J14 JP16 The connectors on the following pages are shown in the same orientation as the picture above, unless...
TITAN - user manual Connectors There are 12 connectors on the TITAN for accessing external devices. Connector Function Connector details in section Serial ports J1 – COMS ports, page Camera J2 – Camera interface connector, page GPIO J3 – GPIO...
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Connectors, LEDs and jumpers J1 – COMS ports Connector: Oupiin 3014-40GRB/SN, 40-way, 2.54mm (0.1") x 2.54mm (0.1") dual row IDC boxed header Mating connector: FCI 71600-040LF Signal name Signal name SCL (I²C ) SDA (I²C ) GND (I²C ) +3V3 (I²C ) TX5+ (RS422) TX5- (RS422) (TX5+/RX5+ RS485)
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VCC_PER (+5V) VCC_PER (+5V) Do NOT attempt to power the TITAN using the VCC_PER pins! VCC_PER is a +5V supply switched under hardware control from the VCC input on J15 pin 1. ALWAYS provide +5V to VCC on J15 pin 1.
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Connectors, LEDs and jumpers J4 – LCD connector Connector: Oupiin 3214-40C00RBA/SN, 40-way, 1.27mm (0.05") x 2.54mm (0.1") right angled boxed header Mating connector: Oupiin 1203-40GB/SN (available from Eurotech on request) Signal name Signal name BLKEN# BLKSAFE LCDSAFE BRT_CTRL_PWM 4 NEGBIAS...
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TITAN - user manual J8 – LVDS connector Connector: Hirose DF13A-20DP-1.25V, 20-way, 1.27mm (0.05") double row straight pin header LVDS mating connector: Hirose DF13-20DS-1.25C LVDS mating connector crimps: Hirose DF13-2630SCFA Eurotech recommended cable: 3M 3600B/20 Signal name Signal name +3V3...
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ALWAYS use the USB client cable provided with the development kit. This cable does not provide power down the cable and avoids reverse powering the TITAN from a USB host when the TITAN has no power on the VCC input on J15 pin 1. Reverse powering the TITAN from the VBUSn pins can make the TITAN operate erratically and may cause serious damage to the TITAN.
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VCC_PER (+5V) Do NOT attempt to power the TITAN using the VCC_PER pins! VCC_PER is an isolated +5V supply switched under hardware control from the VCC input on J15 pin 1. ALWAYS provide +5V to VCC on J15 pin 1.
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VBAT_E provides the facility to fit an external battery for the backup supply of the external 256KByte static RAM and RTC and internal 256KByte static RAM and RTC. A +12V connection is defined, but is not required for the TITAN under normal operation. It can be used to supply +12V to the PC/104 stack if required.
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TITAN - user manual JP1 – Battery disconnect Connector: Oupiin 2011-1x2GSB/SN, 2-way, 2.54mm (0.1") single row through-hole header. Signal name Battery backup switch input Battery + terminal JP2 – LCD logic supply selection Connector: Oupiin 2011-1x3GSB/SN, 3-way, 2.54mm (0.1") single row through-hole header.
Connectors, LEDs and jumpers Status LEDs There is a single status LED on the TITAN, which indicates FLASH access to the FLASH memory / silicon disk. Jumpers There are eight user selectable jumpers on the TITAN; the use of each one is explained below.
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USER_LINKA to C, LK4, 5 and 6 respectively (GPIO 13, 35 and 113 respectively), may be used to wake the TITAN from sleep. One way of doing this is to connect a momentary push to make switch across the USER_LINK and GND.
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This jumper can be used to recover a damaged software image: Description Fetch working image from BOOTP server and execute. Normal software run mode [factory default]. Please contact Eurotech for details. Contact details are provided in Eurotech Worldwide Presence. Reset – LK8 on JP5 A momentary switch (push to make) may be connected to LK1.
Appendix A - Board version / issue Where it is possible to see the TITAN, the board version and issue are indicated on the top side in the upper right-hand corner and on the bottom side in the lower-left corner as shown below.
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Appendix A - Board version / issue CPLD versions The TITAN CPLD versions can be read out of the CPLD versions register [CV_REG] at the address 0x12000000. The CPLD versions bit assignments are detailed in the table below: CPLD versions register [CV_REG]...
TITAN - user manual Appendix B - Specification Microprocessor 416/520MHz XScale processor (520MHz as standard option). Cache 32K data cache, 32K instruction cache, 2K mini data cache. System memory Fixed on-board memory: 64MB SDRAM (32-bit wide SDRAM data bus).
ALL CONNECTOR DIMENSIONS ARE TAKEN FROM PIN 1 When mounting the TITAN use only M3 (metric) or 4-40 (US) screws. The mounting pad is 6.35mm (0.25") and the hole is 3.175mm (0.125") so ensure any washers fitted are smaller than the pad.
A new backlight control connector, J16 has been added to simplify backlight inverter / LED driver cabling. • A 5V supply voltage monitor has been added to reset the TITAN if the VCC input falls below 4.4V. The V1I1 TITAN only monitored the 3.3V supply which allowed the TITAN to continue running below 4.4V.
TITAN - user manual Appendix E - Reference information Product information Product notices, updated drivers, support material, 24hr-online ordering: www.eurotech-ltd.co.uk PC/104 consortium PC/104 specifications, vendor information and available add-on products: www.PC/104.org SDIO card information SD Card Association and product information: www.sdcard.org...
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Appendix E - Reference information National Semiconductor Nat Semi DS90C363BMT NXP LVDS transmitter documentation: www.national.com NXP Semiconductors NXP PCA9535 I²C I/O expander documentation: NXP LM75BGD I²C digital temperature sensor and thermal watchdog documentation: www.nxp.com Wolfson Microelectronics Wolfson WM9712L AC’97 Codec documentation: http://www.wolfsonmicro.com/...
TITAN - user manual Appendix F - ZEUS-FPIF details The ZEUS-FPIF allows easy connection between the TITAN and a TFT or STN LCD flat panel display. Details of the ZEUS-FPIF are shown below: The connectors on the following pages are shown in the same orientation as the picture above.
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Appendix F - ZEUS-FPIF details J1 – TITAN LCD cable connector Connector: Oupiin 3215-40CSB/SN, 40-way, 1.27mm (0.05") x 2.54mm (0.1") straight-boxed header Mating connector: Oupiin 1203-40GB/SN (available from Eurotech on request) Signal name Signal name BLKEN# BLKSAFE BRT_CTRL LCDSAFE NEGBIAS...
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TITAN - user manual J2 – Generic LCD connector Connector: Oupiin 3012-34GSB/SN, 34-way, 2.54mm (0.1") x 2.54mm (0.1") straight-boxed header Mating connector: Fujitsu FCN-723-B034/2 Mating connector crimps: Fujitsu FCN-723J-AU/Q (as it is possible to connect a crimp type connector to...
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Appendix F - ZEUS-FPIF details J3 – Direct connection to a NEC NL3224BC35-20 5.5inch 320x240 TFT display Connector: Oupiin 2345-33TD2/SN Mating cable: Eunsung 0.5x33x190xAx0.035x0.3x5x5x10x10 Signal name Signal name FPD 10 PCLK LCLK (HSYNC) FCLK (VSYNC) FPD 0 FPD 1 FPD 2 FPD 11 FPD 3 FPD 12...
Appendix G - ZEUS-FPIF-CRT details Appendix G - ZEUS-FPIF-CRT details The ZEUS-FPIF-CRT allows the TITAN to drive a CRT monitor or an analogue LCD flat panel. Sync on green and composite sync monitors are not supported. The connectors on the following pages are shown in the same orientation as the picture above.
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TITAN - user manual J1 – TITAN LCD cable connector Connector: Oupiin 3215-40CSB/SN, 40-way, 1.27mm (0.05") x 2.54mm (0.1") straight-boxed header Mating connector: Oupiin 1203-40GB/SN (available from Eurotech on request) Signal name Signal name CLOCK HSYNC VSYNC FPD14 FPD15 FPD12...
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Appendix G - ZEUS-FPIF-CRT details J2 – CRT connector Connector: Oupiin 7916-15FA/SN, 15-way, female, high density, right-angled D-Sub. Signal name Signal name Signal name RED GND GREEN GREEN GND BLUE BLUE GND HSYNC 5V_VGASAFE VSYNC TTL GND SYNC GND (As viewed from the connector pins)
TITAN - user manual Appendix H - Ethernet Breakout details Eurotech can provide an Ethernet breakout board with an RJ45 connector to interface to the TITAN Ethernet connectors J11 and J12. The Ethernet breakout board features brackets for panel mounting ease.
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Signal name Bob Smith Termination Bob Smith Termination LANGND LANGND Ethernet LED signal mapping between TITAN and Ethernet breakout connectors Ethernet breakout PL2 – TITAN J12 – Ethernet status 1x 4-way header LED's connector Signal name Signal name LINK LED+ 3.3V...
TITAN - user manual Appendix I - Acronyms and abbreviations Amplifier Application Program(ming) Interface BTUART Bluetooth Universal Asynchronous Receiver / Transmitter CCCR Core Clock Configuration Register CODEC Coder/Decoder Communication Port CPLD Complex Programmable Logic Device Central Processing Unit (PXA270) CMOS...
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STUART Standard Universal Asynchronous Receiver / Transmitter Thin Film Transistor, a type of LCD flat-panel display screen Transmit UART Universal Asynchronous Receiver / Transmitter Universal Serial Bus Video Graphics Adapter, display resolution 640 x 480 pixels TITAN-ICE TITAN-Industrial Compact Enclosure...
TITAN TITAN-Mx-Fx Eurotech has based its material content knowledge on a combination of information provided by third parties and auditing our suppliers and sub-contractor’s operational activities and arrangements. This information is archived within the associated Technical Construction File. Eurotech has taken reasonable steps to provide representative and accurate information, though may not have conducted destructive testing or chemical analysis on incoming components and materials.
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