Fracf32 Rah, Rbh Fractional Portion Of A 32-Bit Floating-Point Value - Texas Instruments TMS320C28 series Reference Manual

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FRACF32 RaH, RbH
Fractional Portion of a 32-bit Floating-Point Value
Operands
RaH
RbH
Opcode
LSW: 1110 0110
MSW: 0000 0000
Returns in RaH the fractional portion of the 32-bit floating-point value in RbH
Description
This instruction does not affect any flags:
Flags
Flag
Modified
This is a 2 pipeline cycle (2p) instruction. That is:
Pipeline
Any instruction in the delay slot must not use RaH as a destination register or use RaH
as a source operand.
Example
See also
SPRUEO2A – June 2007 – Revised August 2008
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floating-point destination register (R0H to R7H)
floating-point source register (R0H to R7H)
1111 0001
00bb baaa
TF ZI
No No
FRACF32 RaH, RbH
NOP
NOP
MOVIZF32 R2H, #19.625
FRACF32 R3H, R2H
NOP
NI ZF NF
No No No
; 2 pipeline cycles (2p)
; 1 cycle delay or non-conflicting instruction
; <-- FRACF32 completes, RaH updated
; R2H = 19.625 (0x419D0000)
; R3H = FRACF32 (R2H)
; 1 Cycle delay for FRACF32 to complete
; <-- FRACF32 complete, R3H = 0.625 (0x3F200000)
Instructions
LUF LVF
No No
Instruction Set 57