Moviz Rah, #16Fhihex Load The Upper 16-Bits Of A 32-Bit Floating-Point Register - Texas Instruments TMS320C28 series Reference Manual

Instructions
MOVIZ RaH, #16FHiHex
Operands
RaH
#16FHiHex
Opcode
LSW: 1110 1000
MSW: IIII IIII
Note: This instruction only accepts a hex value as the immediate operand. To specify the
Description
immediate value with a floating-point representation use the MOVIZF32 pseudo
instruction.
Load the upper 16-bits of RaH with the immediate value #16FHiHex and clear the low
16-bits of RaH.
#16FHiHex is a 16-bit immediate value that represents the upper 16-bits of an IEEE
32-bit floating-point value. The low 16-bits of the mantissa are assumed to be all 0. The
assembler will only accept a hex immediate value. That is, -1.5 can only be represented
as #0xBFC0. #-1.5 will result in an error.
By itself, MOVIZ is useful for loading a floating-point register with a constant in which the
lowest 16-bits of the mantissa are 0. Some examples are 2.0 (0x40000000), 4.0
(0x40800000), 0.5 (0x3F000000), and -1.5 (0xBFC00000). If a constant requires all
32-bits of a floating-point register to be iniitalized, then use MOVIZ along with the MOVXI
instruction.
RaH[31:16] = #16FHiHex
RaH[15:0] = 0
This instruction modifies the following flags in the STF register:
Flags
Flag
Modified
This is a single-cycle instruction.
Pipeline
Example
; Load R0H with -1.5 (0xBFC00000)
; Load R0H with pi = 3.141593 (0x40490FDB)
MOVIZF32 RaH, #16FHi
See also
MOVXI RaH, #16FLoHex
98 Instruction Set
Load the Upper 16-bits of a 32-bit Floating-Point Register
floating-point register (R0H to R7H)
A 16-bit immediate hex value that represents the upper 16-bits of an IEEE 32-bit
floating-point value. The low 16-bits of the mantissa are assumed to be all 0.
0000 0III
IIII Iaaa
TF ZI
No No
MOVIZ R0H, #0xBFC0
MOVIZ R0H, #0x4049
MOVXI R0H, #0x0FDB
NI ZF NF
No No No
; R0H = 0xBFC00000
; R0H = 0x40490000
; R0H = 0x40490FDB
SPRUEO2A – June 2007 – Revised August 2008
www.ti.com
LUF LVF
No No
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